OMAP3: Low DDR Memory bandwidth

OMAP3: Low DDR Memory bandwidth

[Ganeshan N]

Hi All,
I am using OMAP3EVM and measuring DDR memory bandwidth. Used "lmbench" to measure the bandwidth.  I am getting low bandwidth around 460 MB/S in TI kernel 2.6.22 and getting bandwidth around 800 MB/S in git kernel 2.6.28-rc8.

In kernel 2.6.22, there are two SDRC registers (SDRC_DLLA_CTRL and SDRC_POWER_REG), which are getting modified. I have updated code such that SDRC values for both the  the kernel 2.6.22 and 2.6.28 are same. After this updation there is no improvement in the bandwidth.  The SDRC is running at 166MHz.  I am using same x-loader and u-boot for both the kernel (2.6.22 and 2.6.28).

Can you please suggest some pointers/methods, to increase the DDR memroy bandwidth in 2.6.22 TI kernel.

Thanks in advance.

With Regards
Ganeshan



      

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Re: OMAP3: Low DDR Memory bandwidth

[Marek Vasut]

On Wednesday 04 of February 2009 13:47:41 Ganeshan N wrote:
> Hi All,
> I am using OMAP3EVM and measuring DDR memory bandwidth. Used "lmbench" to
> measure the bandwidth.  I am getting low bandwidth around 460 MB/S in TI
> kernel 2.6.22 and getting bandwidth around 800 MB/S in git kernel
> 2.6.28-rc8.
>
> In kernel 2.6.22, there are two SDRC registers (SDRC_DLLA_CTRL and
> SDRC_POWER_REG), which are getting modified. I have updated code such that
> SDRC values for both the  the kernel 2.6.22 and 2.6.28 are same. After this
> updation there is no improvement in the bandwidth.  The SDRC is running at
> 166MHz.  I am using same x-loader and u-boot for both the kernel (2.6.22
> and 2.6.28).
>
> Can you please suggest some pointers/methods, to increase the DDR memroy
> bandwidth in 2.6.22 TI kernel.
>
> Thanks in advance.

why don't you use the .28 one then ? .22 is way too deprecated.
>
> With Regards
> Ganeshan
>
>
>
>
>
> --
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Re: OMAP3: Low DDR Memory bandwidth

[Måns Rullgård]

Ganeshan N <nganeshan1@yahoo.com> writes:

> Hi All,
> I am using OMAP3EVM and measuring DDR memory bandwidth. Used "lmbench"
> to measure the bandwidth.  I am getting low bandwidth around 460 MB/S
> in TI kernel 2.6.22 and getting bandwidth around 800 MB/S in git
> kernel 2.6.28-rc8.
>
> In kernel 2.6.22, there are two SDRC registers (SDRC_DLLA_CTRL and
> SDRC_POWER_REG), which are getting modified. I have updated code such
> that SDRC values for both the  the kernel 2.6.22 and 2.6.28 are
> same. After this updation there is no improvement in the bandwidth. 
> The SDRC is running at 166MHz.  I am using same x-loader and u-boot
> for both the kernel (2.6.22 and 2.6.28).
>
> Can you please suggest some pointers/methods, to increase the DDR
> memroy bandwidth in 2.6.22 TI kernel.

Check your cache settings.  Enabling or disabling the L2 cache can
have dramatic effects on memory throughput.  For mainly sequential
accesses disabling it can be faster.

-- 
Måns Rullgård
mans@mansr.com

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