[U-Boot] [patch V3] [1/3] PNX8181 SOC support

[Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>]

On 22:54 Sun 04 Jan     , J?rgen Sch?w wrote:
>  cpu/arm926ejs/pnx8181/Makefile     |   45 +++
>  cpu/arm926ejs/pnx8181/timer.c      |  141 ++++++++
>  drivers/i2c/Makefile               |    1 +
>  drivers/i2c/pnx8181_i2c.c          |  304 +++++++++++++++++
> 
> diff --git a/cpu/arm926ejs/pnx8181/Makefile b/cpu/arm926ejs/pnx8181/Makefile
> new file mode 100644
> index 0000000..b34d9e8
> --- /dev/null
> +++ b/cpu/arm926ejs/pnx8181/Makefile
> @@ -0,0 +1,45 @@
> +#
> +# (C) Copyright 2000-2006
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB	= $(obj)lib$(SOC).a
> +
> +COBJS	= timer.o
> +
> +SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
> +
> +all:	$(obj).depend $(LIB)
> +
> +$(LIB):	$(OBJS)
> +	$(AR) $(ARFLAGS) $@ $(OBJS)
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/cpu/arm926ejs/pnx8181/timer.c b/cpu/arm926ejs/pnx8181/timer.c
> new file mode 100644
> index 0000000..585aede
> --- /dev/null
> +++ b/cpu/arm926ejs/pnx8181/timer.c
> @@ -0,0 +1,141 @@
> +/*
> + * pnx8181 SOC timer routines
> + *
> + * (C) Copyright 2007-2009, emlix GmbH, Germany
> + * Juergen Schoew <js@emlix.com>
> + *
> + * (C) Copyright 2008, DSPG Technologies GmbH, Germany
> + * (C) Copyright 2007, NXP Semiconductors Germany GmbH
> + * Matthias Wenzel, <nxp@mazzoo.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +
> +/*
> + * timer without interrupts
> + */
> +/* timer */
> +#define PNX8181_SCTU1_BASE	0xC2102000
> +#define PNX8181_SCTU2_BASE	0xC2103000
> +
> +#define PNX8181_SCTU_TIMxCR	0x00
> +#define PNX8181_SCTU_TIMxRR	0x04
> +#define PNX8181_SCTU_TIMxWR	0x08
> +#define PNX8181_SCTU_TIMxC0	0x0c
> +#define PNX8181_SCTU_TIMxC1	0x10
> +#define PNX8181_SCTU_TIMxC2	0x14
> +#define PNX8181_SCTU_TIMxC3	0x18
> +#define PNX8181_SCTU_TIMxSR	0x1c
> +#define PNX8181_SCTU_TIMxPR	0x20
please moce this to a header
> +
> +/*
> + * U-Boot expects a 32 bit timer, running at CONFIG_SYS_HZ
> + * Keep total timer count to avoid losing decrements < div_timer
> + */
> +
> +/* U-Boot ticks since startup */
> +static ulong timestamp;
> +static ulong last_timer_read;
> +
> +/*
> + * starts up a counter
> + */
> +void timer_init(void)
> +{
> +	/* set prescaler to have timer run at 64 kHz */
> +	writeb(0x00, (void *)(PNX8181_SCTU1_BASE + PNX8181_SCTU_TIMxPR));
> +
> +	/* timer reload value = 0xffff - 13824, overflow @ 1kHz */
> +	writew(0xca00, (void *)(PNX8181_SCTU1_BASE + PNX8181_SCTU_TIMxRR));
> +
> +	/* timer has no interrupt, run */
> +	writew(0x0001, (void *)(PNX8181_SCTU1_BASE + PNX8181_SCTU_TIMxCR));
> +
> +	/* init the timestamp */
> +	reset_timer_masked();
> +}
> +
> +ulong get_timer(ulong base_ticks)
> +{
> +	return get_timer_masked() - base_ticks;
> +}
> +
> +/*
> + * converts the timer reading to U-Boot ticks
> + * the timestamp is the number of ticks since reset
> + */
> +ulong get_timer_masked(void)
> +{
> +	/* get current count */
> +	ulong now = readw((void *)(PNX8181_SCTU1_BASE + PNX8181_SCTU_TIMxWR));
> +
> +	if (now < last_timer_read)
> +		timestamp += 13824;
> +	last_timer_read = now;
> +
> +	/*
> +	 * FIXME	this value is empirical!
> +	 *		for some reason the calculated values are way to fast
> +	 */
> +	return (timestamp + now) / 64;
> +}
> +
> +/*
> + * timer without interrupts
> + */
> +void reset_timer(void)
> +{
> +	reset_timer_masked();
> +}
> +
> +
> +/* busy-loop spin-delay */
> +void sdelay(unsigned long usec)
> +{
> +	ulong i, tmp;
> +	tmp = 42;
> +	for (i = 0 ; i < usec*3 ; i++)
> +		/* avoid compiler optimisation */
> +		tmp = -tmp;
> +}
> +
> +/* delay usec useconds */
> +void udelay(unsigned long usec)
> +{
> +	ulong tmo, tmp;
> +
> +	/* Convert to U-Boot ticks */
> +	tmo  = usec / 1500;
> +
> +	tmp  = get_timer_masked();	/* get current timestamp */
> +	tmo += tmp;			/* form target timestamp */
> +
> +	/* loop till event */
> +	while (get_timer_masked() < tmo)
> +		;
> +}
> +
> +void reset_timer_masked(void)
> +{
> +	/* start "advancing" time stamp from 0 */
> +	timestamp = 0L;
> +}
> diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
> index 6079c05..ef457a5 100644
> --- a/drivers/i2c/Makefile
> +++ b/drivers/i2c/Makefile
> @@ -31,6 +31,7 @@ COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
>  COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
>  COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
>  COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
> +COBJS-$(CONFIG_PNX8181_I2C) += pnx8181_i2c.o
please keep list sorted
>  
>  COBJS	:= $(COBJS-y)
>  SRCS	:= $(COBJS:.o=.c)
> diff --git a/drivers/i2c/pnx8181_i2c.c b/drivers/i2c/pnx8181_i2c.c
> new file mode 100644
> index 0000000..75a76a4
> --- /dev/null
> +++ b/drivers/i2c/pnx8181_i2c.c
> @@ -0,0 +1,304 @@
> +/*
> + * (C) Copyright 2008-2009, emlix GmbH, Germany
> + * Juergen Schoew <js@emlix.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + */
> +
> +#include <config.h>
> +#include <common.h>
> +#include <asm/io.h>
> +
> +#define I2C_TIMEOUT		10000
> +#define I2C_DELAY		10
> +
> +#define ARM_VPB1_BASE_ADDR	0xC2000000
> +#define ARM_VPB3_BASE_ADDR	0xC2200000
> +#define ARM_VPB_SIZE_SHIFT	12
please move define to a header
> +
> +#define SCON_BASE_ADDR		(ARM_VPB3_BASE_ADDR + (4<<ARM_VPB_SIZE_SHIFT))
> +#define SCON_BASE		SCON_BASE_ADDR
> +#define SCON_SYSMUX1_OFFSET	(0x010)
> +#define SCON_SYSMUX1_REG	(void *)(SCON_BASE + SCON_SYSMUX1_OFFSET)
> +#define SCON_GPIOA27_MUX_SHIFT	22
> +#define SCON_GPIOA27_MUX_FIELD	(0xFFFFFFFF-(3<<SCON_GPIOA27_MUX_SHIFT))
> +#define SCON_GPIOA27_SCL	(1<<SCON_GPIOA27_MUX_SHIFT)
> +#define SCON_GPIOA28_MUX_SHIFT	24
> +#define SCON_GPIOA28_MUX_FIELD	(0xFFFFFFFF-(3<<SCON_GPIOA28_MUX_SHIFT))
> +#define SCON_GPIOA28_SDA	(1<<SCON_GPIOA28_MUX_SHIFT)
> +
> +#define CGU_BASE_ADDR		(ARM_VPB3_BASE_ADDR + (0<<ARM_VPB_SIZE_SHIFT))
> +#define CGU_BASE		(CGU_BASE_ADDR)
> +#define CGU_GATESC_OFFSET	(0x008)
> +#define CGU_GATESC_REG		(void *)(CGU_BASE + CGU_GATESC_OFFSET)
> +#define CGU_I2C1EN		0x00000020
> +#define CGU_I2CEN		CGU_I2C1EN
> +
> +#define I2C_BASE_ADDR		(ARM_VPB1_BASE_ADDR + (1<<ARM_VPB_SIZE_SHIFT))
> +#define I2C_BASE		I2C_BASE_ADDR
> +#define I2C_CLKHI_OFFSET	(0x00C)
> +#define I2C_CLKHI_REG		(void *)(I2C_BASE + I2C_CLKHI_OFFSET)
> +#define I2C_CLKLO_OFFSET	(0x010)
> +#define I2C_CLKLO_REG		(void *)(I2C_BASE + I2C_CLKLO_OFFSET)
> +#define I2C_ADR_OFFSET		(0x014)
> +#define I2C_ADR_REG             (void *)(I2C_BASE + I2C_ADR_OFFSET)
		      ^^^^^^^^^^^^^
whitespace please fix
> +#define I2C_SADDR_FIELD         0xFFFFFF80
		          ^^^^^^^^^
whitespace please fix
and other in the code please fix

Best Regards,
J.