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From: Ingo Molnar <mingo@elte.hu>
To: Jaswinder Singh Rajput <jaswinder@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	LKML <linux-kernel@vger.kernel.org>,
	x86 maintainers <x86@kernel.org>,
	Paul Mackerras <paulus@samba.org>
Subject: Re: [git-pull -tip] x86: Basic AMD Support for performance counters
Date: Sun, 1 Mar 2009 09:36:16 +0100	[thread overview]
Message-ID: <20090301083616.GA1742@elte.hu> (raw)
In-Reply-To: <20090228134434.GA32473@elte.hu>


* Ingo Molnar <mingo@elte.hu> wrote:

> Seems to be working fine, here's the output from an Athlon 64 
> 3200+ (Sempron) box:
> 
>  Performance counter stats for 'ls':
> 
>       17.420811  task clock ticks     (msecs)
> 
>               0  CPU migrations       (events)
>              12  context switches     (events)
>             583  pagefaults           (events)
>        29760299  CPU cycles           (events)
>        29401642  instructions         (events)
>        12698498  cache references     (events)
>           66269  cache misses         (events)
> 
>  Wall-clock time elapsed:   687.999988 msecs

The patches cause a crash on another system - an Opteron system 
spontaneous reboots at this point during early bootup:

CPU 0/0x4 -> Node 0
tseg: 00cfe00000
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
using C1E aware idle routine
AMD Performance Monitoring support detected.
... num counters:    4
... value mask:      0000000000000000
... fixed counters:  0
... counter mask:    000000000000000f
ACPI: Core revision 20081204
ftrace: converting mcount calls to 0f 1f 44 00 00
ftrace: allocating 16365 entries in 129 pages
Setting APIC routing to physical flat
masked ExtINT on CPU#0
ENABLING IO
[reboot]

this is the CPU type:

processor	: 15
vendor_id	: AuthenticAMD
cpu family	: 16
model		: 2
model name	: Quad-Core AMD Opteron(tm) Processor 8356
stepping	: 3
cpu MHz		: 2300.000
cache size	: 512 KB
physical id	: 4
siblings	: 4
core id		: 3
cpu cores	: 4
fpu		: yes
fpu_exception	: yes
cpuid level	: 5
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep 
mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall 
nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc 
rep_good pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic 
cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs
bogomips	: 4622.47
TLB size	: 1024 4K pages
clflush size	: 64
cache_alignment	: 64
address sizes	: 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate

	Ingo

  reply	other threads:[~2009-03-01  8:36 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-02-27 17:37 [git-pull -tip] x86: Basic AMD Support for performance counters Jaswinder Singh Rajput
2009-02-28  9:40 ` Ingo Molnar
2009-02-28 13:44   ` Ingo Molnar
2009-03-01  8:36     ` Ingo Molnar [this message]
2009-03-01 10:41       ` Jaswinder Singh Rajput
2009-03-01 11:30         ` Ingo Molnar
2009-03-01 11:41           ` Jaswinder Singh Rajput
2009-03-01 11:58             ` Ingo Molnar
2009-03-01 12:00               ` Ingo Molnar
2009-03-01 12:14                 ` Jaswinder Singh Rajput

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