Re: PXA SSP - work in progress

[Daniel Mack <daniel@caiaq.de>]

Hi Mark,

On Fri, Mar 13, 2009 at 02:37:24PM +0000, Mark Brown wrote:
> I worked a bit on the PXA SSP code last night and was able to come up
> with a configuration which uses non-network mode for I2S and works well
> on the Zylonite.  I'll post the current series I have in a followup to
> this, if you could take a look that'd be great - I haven't yet worked
> through all the testing I'd like to do.
> 
> Unfortunately it's going to have broken Daniel's configuration since I
> inverted the sense of LRCLK as the chip seemed not to generate an LRCLK
> with a non-zero frame delay; I need to check to see if this is just
> something I've overlooked.  Hopefully Daniel's system should just have
> inverted the left and right channels.

I can confirm that my board still works with your latest patches, so I'm
fine with your changes :) And indeed - the channels were inverted, I
didn't check that before as it wasn't my greatest concern ...

Thanks,
Daniel