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From: Christoph Egger <Christoph.Egger@amd.com>
To: xen-devel@lists.xensource.com
Cc: George Dunlap <george.dunlap@eu.citrix.com>,
	"Huang2, Wei" <Wei.Huang2@amd.com>,
	Keir Fraser <Keir.Fraser@eu.citrix.com>
Subject: Re: Real-mode bug with AMD, gPXE, and 32-bit rep movs
Date: Thu, 26 Mar 2009 17:24:06 +0100	[thread overview]
Message-ID: <200903261724.06593.Christoph.Egger@amd.com> (raw)
In-Reply-To: <49CB9BFA.50408@eu.citrix.com>

On Thursday 26 March 2009 16:15:06 George Dunlap wrote:
> Keir Fraser wrote:
> > On 26/03/2009 12:25, "George Dunlap" <George.Dunlap@eu.citrix.com> wrote:
> >> There are three possibilities I came up with:
> >> 1) The same thing would happen outside of SVM; in which case it's
> >> (sort of) a gPXE bug for using an instruction that won't work on AMD
> >> boxes.
> >> 2) Xen is subtly screwing up the VM state, causing the AMD hardware
> >> not to recognize that this shouldn't cause a #GP

I think it's #2. Look at the #GP causes in APM 
Volume 2 for MOVSx: the only one in real mode is if the address 
exceeded a data segment limit.  And the comment from Deegan about 
clipping segment limits to 16 bits makes me think that the clipping is 
happening on AMD machines and it shouldn't be.

So probably, VMCB.DS.LIMIT is smaller than it should be. Note, that
AMD requires the segment limit to be the effective limit and
the granularity segment attribute is ignored.

Christoph


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  reply	other threads:[~2009-03-26 16:24 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-03-26 12:25 Real-mode bug with AMD, gPXE, and 32-bit rep movs George Dunlap
2009-03-26 14:43 ` Keir Fraser
2009-03-26 14:54   ` Tim Deegan
2009-03-26 15:15   ` George Dunlap
2009-03-26 16:24     ` Christoph Egger [this message]
2009-03-26 16:31       ` Tim Deegan
2009-03-30 15:02         ` George Dunlap
     [not found] <200903310456.39523.mcb30@etherboot.org>
2009-03-31  7:21 ` Keir Fraser
2009-03-31 13:06 ` Keir Fraser

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