From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LnhQL-000727-U2 for qemu-devel@nongnu.org; Sat, 28 Mar 2009 18:54:45 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LnhQL-00071r-Gs for qemu-devel@nongnu.org; Sat, 28 Mar 2009 18:54:45 -0400 Received: from [199.232.76.173] (port=40994 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LnhQL-00071o-Bu for qemu-devel@nongnu.org; Sat, 28 Mar 2009 18:54:45 -0400 Received: from hall.aurel32.net ([88.191.82.174]:50958) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LnhQK-0005YZ-Ss for qemu-devel@nongnu.org; Sat, 28 Mar 2009 18:54:45 -0400 Received: from aurel32 by hall.aurel32.net with local (Exim 4.69) (envelope-from ) id 1LnhQJ-0007H7-MS for qemu-devel@nongnu.org; Sat, 28 Mar 2009 23:54:43 +0100 Date: Sat, 28 Mar 2009 23:54:43 +0100 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH 0/4] target-ppc: create TCG slots for registers based on CPU Message-ID: <20090328225443.GL20944@hall.aurel32.net> References: <1238275817-9758-1-git-send-email-froydnj@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1238275817-9758-1-git-send-email-froydnj@codesourcery.com> Sender: Aurelien Jarno Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Sat, Mar 28, 2009 at 02:30:13PM -0700, Nathan Froyd wrote: > For PPC guests, I noticed that we create TCG slots for all the potential > kinds of registers (float, Altivec, SPE), even if the chip doesn't have > instructions to access those registers. > > This patch series tweaks the initialization routine to create the TCG > values for registers necessary for particular classes of instructions > only if the emulated chip supports those instructions. The first couple > of patches are simply busywork of moving things around; the last patch > is where all the action is at. > > I am not a TCG expert, but there are several loops in TCG over all > globals and it seems like those loops would go faster if they didn't > have to consider registers that would never be touched. If this patch > series makes no difference in TCG's performance, then I'd be glad to > have an explanation of why that's the case. Do you actually have run a benchmark with those changes? TCG is sometimes a bit strange, and some optimizations does not change the execution speed, while others improve it a lot. It is very difficult to predict what will give a gain or not. Suggestions of benchmarks: gzip/bzip2 on a big file using user emulation or a compilation in system emulation. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net