From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LrgjK-0000xs-GA for qemu-devel@nongnu.org; Wed, 08 Apr 2009 18:58:50 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LrgjK-0000xV-5H for qemu-devel@nongnu.org; Wed, 08 Apr 2009 18:58:50 -0400 Received: from [199.232.76.173] (port=45511 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LrgjJ-0000xN-PX for qemu-devel@nongnu.org; Wed, 08 Apr 2009 18:58:49 -0400 Received: from hall.aurel32.net ([88.191.82.174]:35396) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LrgjJ-0002Iv-8o for qemu-devel@nongnu.org; Wed, 08 Apr 2009 18:58:49 -0400 Date: Thu, 9 Apr 2009 00:58:44 +0200 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH] apic: Fix access to non-existent APIC Message-ID: <20090408225844.GC23493@volta.aurel32.net> References: <49DB8E4E.8010904@siemens.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <49DB8E4E.8010904@siemens.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: qemu-devel@nongnu.org On Tue, Apr 07, 2009 at 07:33:02PM +0200, Jan Kiszka wrote: > When running with -M isapc, there is no env->apic_state. Fix > cpu_get/set_apic_* helpers to handle this corner case gracefully. > > Signed-off-by: Jan Kiszka > --- > > hw/apic.c | 11 ++++++++--- > 1 files changed, 8 insertions(+), 3 deletions(-) Thanks, applied. > diff --git a/hw/apic.c b/hw/apic.c > index 5a76498..d63d74b 100644 > --- a/hw/apic.c > +++ b/hw/apic.c > @@ -280,6 +280,8 @@ void cpu_set_apic_base(CPUState *env, uint64_t val) > #ifdef DEBUG_APIC > printf("cpu_set_apic_base: %016" PRIx64 "\n", val); > #endif > + if (!s) > + return; > s->apicbase = (val & 0xfffff000) | > (s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE)); > /* if disabled, cannot be enabled again */ > @@ -294,14 +296,17 @@ uint64_t cpu_get_apic_base(CPUState *env) > { > APICState *s = env->apic_state; > #ifdef DEBUG_APIC > - printf("cpu_get_apic_base: %016" PRIx64 "\n", (uint64_t)s->apicbase); > + printf("cpu_get_apic_base: %016" PRIx64 "\n", > + s ? (uint64_t)s->apicbase: 0); > #endif > - return s->apicbase; > + return s ? s->apicbase : 0; > } > > void cpu_set_apic_tpr(CPUX86State *env, uint8_t val) > { > APICState *s = env->apic_state; > + if (!s) > + return; > s->tpr = (val & 0x0f) << 4; > apic_update_irq(s); > } > @@ -309,7 +314,7 @@ void cpu_set_apic_tpr(CPUX86State *env, uint8_t val) > uint8_t cpu_get_apic_tpr(CPUX86State *env) > { > APICState *s = env->apic_state; > - return s->tpr >> 4; > + return s ? s->tpr >> 4 : 0; > } > > /* return -1 if no bit is set */ > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net