From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: Re: [PATCH v2] spi: Add support for the OpenCores SPI controller. Date: Tue, 28 Apr 2009 13:15:32 +0200 Message-ID: <20090428111532.GA14422@avionic-design.de> References: <200904041227.54687.david-b@pacbell.net> <1240916464-4187-1-git-send-email-thierry.reding@avionic-design.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: David Brownell Return-path: Content-Disposition: inline In-Reply-To: <1240916464-4187-1-git-send-email-thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: spi-devel-general-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: linux-spi.vger.kernel.org * Thierry Reding wrote: > This patch adds a platform device driver that supports the OpenCores SPI > controller. > > The driver expects two resources: an IORESOURCE_MEM resource defining the > core's memory-mapped registers and an IORESOURCE_IRQ for the associated > interrupt. It also requires a clock, "spi-master-clk", used to compute the > clock divider. > > Signed-off-by: Thierry Reding [snip] This second version is pretty much a rewrite. Some notes about the most important changes: * uses per-chip states to allow more slaves to use the controller concurrently * rejects invalid device configurations during setup * rejects invalid per-message and per-transfer options * queues messages so that they can be processed one after another - this also provides for a way to handle power-management * omits the spioc.h (and with it the platform data structure): - uses the platform_device.id for the bus number - always uses 8 chipselects because that's the maximum that the core supports I couldn't really find a way to implement per-transfer overrides for the word size because the controller simply has no concept of word sizes. Is it in such cases still necessary to hardwire the word size to 8 bits? Thierry ------------------------------------------------------------------------------ Register Now & Save for Velocity, the Web Performance & Operations Conference from O'Reilly Media. Velocity features a full day of expert-led, hands-on workshops and two days of sessions from industry leaders in dedicated Performance & Operations tracks. Use code vel09scf and Save an extra 15% before 5/3. http://p.sf.net/sfu/velocityconf From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760418AbZD1LP6 (ORCPT ); Tue, 28 Apr 2009 07:15:58 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1758950AbZD1LPr (ORCPT ); Tue, 28 Apr 2009 07:15:47 -0400 Received: from moutng.kundenserver.de ([212.227.126.171]:52997 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758922AbZD1LPq (ORCPT ); Tue, 28 Apr 2009 07:15:46 -0400 Date: Tue, 28 Apr 2009 13:15:32 +0200 From: Thierry Reding To: David Brownell Cc: spi-devel-general@lists.sourceforge.net, linux-kernel@vger.kernel.org Subject: Re: [spi-devel-general] [PATCH v2] spi: Add support for the OpenCores SPI controller. Message-ID: <20090428111532.GA14422@avionic-design.de> References: <200904041227.54687.david-b@pacbell.net> <1240916464-4187-1-git-send-email-thierry.reding@avionic-design.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1240916464-4187-1-git-send-email-thierry.reding@avionic-design.de> User-Agent: Mutt/1.5.18 (2008-05-17) X-Provags-ID: V01U2FsdGVkX184m94gi8Xp+gLEAheAPghxy15teY3o2gOYnSq 3LkA8Cljo5plHHW1HQLjiwut7jo6ZXy/HPrmSMAhO1BEx0mT+j W9x+qgfEKBW4LG/ye390Q== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Thierry Reding wrote: > This patch adds a platform device driver that supports the OpenCores SPI > controller. > > The driver expects two resources: an IORESOURCE_MEM resource defining the > core's memory-mapped registers and an IORESOURCE_IRQ for the associated > interrupt. It also requires a clock, "spi-master-clk", used to compute the > clock divider. > > Signed-off-by: Thierry Reding [snip] This second version is pretty much a rewrite. Some notes about the most important changes: * uses per-chip states to allow more slaves to use the controller concurrently * rejects invalid device configurations during setup * rejects invalid per-message and per-transfer options * queues messages so that they can be processed one after another - this also provides for a way to handle power-management * omits the spioc.h (and with it the platform data structure): - uses the platform_device.id for the bus number - always uses 8 chipselects because that's the maximum that the core supports I couldn't really find a way to implement per-transfer overrides for the word size because the controller simply has no concept of word sizes. Is it in such cases still necessary to hardwire the word size to 8 bits? Thierry