diff for duplicates of <20090429220929.995031553@mini.kroah.org> diff --git a/a/1.txt b/N1/1.txt index d4bd848..de4bba5 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,3 +1,126 @@ -An embedded and charset-unspecified text was scrubbed... -Name: ath9k-implement-io-serialization.patch -Url: http://lists.ath9k.org/pipermail/ath9k-devel/attachments/20090429/0eacbaf6/attachment.txt +2.6.27-stable review patch. If anyone has any objections, please let us know. + +------------------ + +From: Luis R. Rodriguez <lrodriguez@atheros.com> + +This is a port of: +commit SHA1 6158425be398936af1fd04451f78ffad01529cb0 +for 2.6.27 + +All 802.11n PCI devices (Cardbus, PCI, mini-PCI) require +serialization of IO when on non-uniprocessor systems. PCI +express devices not not require this. + +This should fix our only last standing open ath9k kernel.org +bugzilla bug report: + +http://bugzilla.kernel.org/show_bug.cgi?id=12110 + +Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +--- + drivers/net/wireless/ath9k/ath9k.h | 4 ++-- + drivers/net/wireless/ath9k/core.c | 1 + + drivers/net/wireless/ath9k/core.h | 33 +++++++++++++++++++++++++++++++++ + drivers/net/wireless/ath9k/hw.c | 19 +++++++++++++++++++ + 4 files changed, 55 insertions(+), 2 deletions(-) + +--- a/drivers/net/wireless/ath9k/ath9k.h ++++ b/drivers/net/wireless/ath9k/ath9k.h +@@ -591,8 +591,8 @@ struct ath9k_country_entry { + u8 iso[3]; + }; + +-#define REG_WRITE(_ah, _reg, _val) iowrite32(_val, _ah->ah_sh + _reg) +-#define REG_READ(_ah, _reg) ioread32(_ah->ah_sh + _reg) ++#define REG_WRITE(_ah, _reg, _val) ath9k_iowrite32((_ah), (_reg), (_val)) ++#define REG_READ(_ah, _reg) ath9k_ioread32((_ah), (_reg)) + + #define SM(_v, _f) (((_v) << _f##_S) & _f) + #define MS(_v, _f) (((_v) & _f) >> _f##_S) +--- a/drivers/net/wireless/ath9k/core.c ++++ b/drivers/net/wireless/ath9k/core.c +@@ -1120,6 +1120,7 @@ int ath_init(u16 devid, struct ath_softc + sc->sc_cachelsz = csz << 2; /* convert to bytes */ + + spin_lock_init(&sc->sc_resetlock); ++ spin_lock_init(&sc->sc_serial_rw); + + ah = ath9k_hw_attach(devid, sc, sc->mem, &status); + if (ah == NULL) { +--- a/drivers/net/wireless/ath9k/core.h ++++ b/drivers/net/wireless/ath9k/core.h +@@ -1022,6 +1022,7 @@ struct ath_softc { + spinlock_t sc_rxbuflock; + spinlock_t sc_txbuflock; + spinlock_t sc_resetlock; ++ spinlock_t sc_serial_rw; + spinlock_t node_lock; + }; + +@@ -1069,4 +1070,36 @@ void ath_skb_unmap_single(struct ath_sof + void ath_mcast_merge(struct ath_softc *sc, u32 mfilt[2]); + enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc); + ++/* ++ * Read and write, they both share the same lock. We do this to serialize ++ * reads and writes on Atheros 802.11n PCI devices only. This is required ++ * as the FIFO on these devices can only accept sanely 2 requests. After ++ * that the device goes bananas. Serializing the reads/writes prevents this ++ * from happening. ++ */ ++ ++static inline void ath9k_iowrite32(struct ath_hal *ah, u32 reg_offset, u32 val) ++{ ++ if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) { ++ unsigned long flags; ++ spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags); ++ iowrite32(val, ah->ah_sc->mem + reg_offset); ++ spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags); ++ } else ++ iowrite32(val, ah->ah_sc->mem + reg_offset); ++} ++ ++static inline unsigned int ath9k_ioread32(struct ath_hal *ah, u32 reg_offset) ++{ ++ u32 val; ++ if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) { ++ unsigned long flags; ++ spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags); ++ val = ioread32(ah->ah_sc->mem + reg_offset); ++ spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags); ++ } else ++ val = ioread32(ah->ah_sc->mem + reg_offset); ++ return val; ++} ++ + #endif /* CORE_H */ +--- a/drivers/net/wireless/ath9k/hw.c ++++ b/drivers/net/wireless/ath9k/hw.c +@@ -369,6 +369,25 @@ static void ath9k_hw_set_defaults(struct + } + + ah->ah_config.intr_mitigation = 0; ++ ++ /* ++ * We need this for PCI devices only (Cardbus, PCI, miniPCI) ++ * _and_ if on non-uniprocessor systems (Multiprocessor/HT). ++ * This means we use it for all AR5416 devices, and the few ++ * minor PCI AR9280 devices out there. ++ * ++ * Serialization is required because these devices do not handle ++ * well the case of two concurrent reads/writes due to the latency ++ * involved. During one read/write another read/write can be issued ++ * on another CPU while the previous read/write may still be working ++ * on our hardware, if we hit this case the hardware poops in a loop. ++ * We prevent this by serializing reads and writes. ++ * ++ * This issue is not present on PCI-Express devices or pre-AR5416 ++ * devices (legacy, 802.11abg). ++ */ ++ if (num_possible_cpus() > 1) ++ ah->ah_config.serialize_regmode = SER_REG_MODE_AUTO; + } + + static inline void ath9k_hw_override_ini(struct ath_hal *ah, diff --git a/a/content_digest b/N1/content_digest index ab77d6d..a089aa7 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,13 +1,157 @@ "ref\020090429220659.339950874@mini.kroah.org\0" "ref\020090429221657.GA11765@kroah.com\0" "From\0Greg KH <gregkh@suse.de>\0" - "Subject\0[ath9k-devel] [patch 47/58] ath9k: implement IO serialization\0" + "Subject\0[patch 47/58] ath9k: implement IO serialization\0" "Date\0Wed, 29 Apr 2009 15:07:46 -0700\0" - "To\0ath9k-devel@lists.ath9k.org\0" + "To\0linux-kernel@vger.kernel.org" + " stable@kernel.org\0" + "Cc\0Justin Forbes <jmforbes@linuxtx.org>" + Zwane Mwaikambo <zwane@arm.linux.org.uk> + Theodore Ts'o <tytso@mit.edu> + Randy Dunlap <rdunlap@xenotime.net> + Dave Jones <davej@redhat.com> + Chuck Wolber <chuckw@quantumlinux.com> + Chris Wedgwood <reviews@ml.cw.f00f.org> + Michael Krufky <mkrufky@linuxtv.org> + Chuck Ebbert <cebbert@redhat.com> + Domenico Andreoli <cavokz@gmail.com> + Willy Tarreau <w@1wt.eu> + Rodrigo Rubira Branco <rbranco@la.checkpoint.com> + Jake Edge <jake@lwn.net> + Eugene Teo <eteo@redhat.com> + torvalds@linux-foundation.org + akpm@linux-foundation.org + alan@lxorguk.ukuu.org.uk + Luis R. Rodriguez <lrodriguez@atheros.com> + ath9k-devel@venema.h4ckr.net + " linux-wireless@vger.kernel.org\0" "\00:1\0" "b\0" - "An embedded and charset-unspecified text was scrubbed...\n" - "Name: ath9k-implement-io-serialization.patch\n" - Url: http://lists.ath9k.org/pipermail/ath9k-devel/attachments/20090429/0eacbaf6/attachment.txt + "2.6.27-stable review patch. If anyone has any objections, please let us know.\n" + "\n" + "------------------\n" + "\n" + "From: Luis R. Rodriguez <lrodriguez@atheros.com>\n" + "\n" + "This is a port of:\n" + "commit SHA1 6158425be398936af1fd04451f78ffad01529cb0\n" + "for 2.6.27\n" + "\n" + "All 802.11n PCI devices (Cardbus, PCI, mini-PCI) require\n" + "serialization of IO when on non-uniprocessor systems. PCI\n" + "express devices not not require this.\n" + "\n" + "This should fix our only last standing open ath9k kernel.org\n" + "bugzilla bug report:\n" + "\n" + "http://bugzilla.kernel.org/show_bug.cgi?id=12110\n" + "\n" + "Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>\n" + "Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>\n" + "---\n" + " drivers/net/wireless/ath9k/ath9k.h | 4 ++--\n" + " drivers/net/wireless/ath9k/core.c | 1 +\n" + " drivers/net/wireless/ath9k/core.h | 33 +++++++++++++++++++++++++++++++++\n" + " drivers/net/wireless/ath9k/hw.c | 19 +++++++++++++++++++\n" + " 4 files changed, 55 insertions(+), 2 deletions(-)\n" + "\n" + "--- a/drivers/net/wireless/ath9k/ath9k.h\n" + "+++ b/drivers/net/wireless/ath9k/ath9k.h\n" + "@@ -591,8 +591,8 @@ struct ath9k_country_entry {\n" + " \tu8 iso[3];\n" + " };\n" + " \n" + "-#define REG_WRITE(_ah, _reg, _val) iowrite32(_val, _ah->ah_sh + _reg)\n" + "-#define REG_READ(_ah, _reg) ioread32(_ah->ah_sh + _reg)\n" + "+#define REG_WRITE(_ah, _reg, _val) ath9k_iowrite32((_ah), (_reg), (_val))\n" + "+#define REG_READ(_ah, _reg) ath9k_ioread32((_ah), (_reg))\n" + " \n" + " #define SM(_v, _f) (((_v) << _f##_S) & _f)\n" + " #define MS(_v, _f) (((_v) & _f) >> _f##_S)\n" + "--- a/drivers/net/wireless/ath9k/core.c\n" + "+++ b/drivers/net/wireless/ath9k/core.c\n" + "@@ -1120,6 +1120,7 @@ int ath_init(u16 devid, struct ath_softc\n" + " \tsc->sc_cachelsz = csz << 2;\t/* convert to bytes */\n" + " \n" + " \tspin_lock_init(&sc->sc_resetlock);\n" + "+\tspin_lock_init(&sc->sc_serial_rw);\n" + " \n" + " \tah = ath9k_hw_attach(devid, sc, sc->mem, &status);\n" + " \tif (ah == NULL) {\n" + "--- a/drivers/net/wireless/ath9k/core.h\n" + "+++ b/drivers/net/wireless/ath9k/core.h\n" + "@@ -1022,6 +1022,7 @@ struct ath_softc {\n" + " \tspinlock_t sc_rxbuflock;\n" + " \tspinlock_t sc_txbuflock;\n" + " \tspinlock_t sc_resetlock;\n" + "+\tspinlock_t sc_serial_rw;\n" + " \tspinlock_t node_lock;\n" + " };\n" + " \n" + "@@ -1069,4 +1070,36 @@ void ath_skb_unmap_single(struct ath_sof\n" + " void ath_mcast_merge(struct ath_softc *sc, u32 mfilt[2]);\n" + " enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc);\n" + " \n" + "+/*\n" + "+ * Read and write, they both share the same lock. We do this to serialize\n" + "+ * reads and writes on Atheros 802.11n PCI devices only. This is required\n" + "+ * as the FIFO on these devices can only accept sanely 2 requests. After\n" + "+ * that the device goes bananas. Serializing the reads/writes prevents this\n" + "+ * from happening.\n" + "+ */\n" + "+\n" + "+static inline void ath9k_iowrite32(struct ath_hal *ah, u32 reg_offset, u32 val)\n" + "+{\n" + "+\tif (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {\n" + "+\t\tunsigned long flags;\n" + "+\t\tspin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);\n" + "+\t\tiowrite32(val, ah->ah_sc->mem + reg_offset);\n" + "+\t\tspin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);\n" + "+\t} else\n" + "+\t\tiowrite32(val, ah->ah_sc->mem + reg_offset);\n" + "+}\n" + "+\n" + "+static inline unsigned int ath9k_ioread32(struct ath_hal *ah, u32 reg_offset)\n" + "+{\n" + "+\tu32 val;\n" + "+\tif (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {\n" + "+\t\tunsigned long flags;\n" + "+\t\tspin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);\n" + "+\t\tval = ioread32(ah->ah_sc->mem + reg_offset);\n" + "+\t\tspin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);\n" + "+\t} else\n" + "+\t\tval = ioread32(ah->ah_sc->mem + reg_offset);\n" + "+\treturn val;\n" + "+}\n" + "+\n" + " #endif /* CORE_H */\n" + "--- a/drivers/net/wireless/ath9k/hw.c\n" + "+++ b/drivers/net/wireless/ath9k/hw.c\n" + "@@ -369,6 +369,25 @@ static void ath9k_hw_set_defaults(struct\n" + " \t}\n" + " \n" + " \tah->ah_config.intr_mitigation = 0;\n" + "+\n" + "+\t/*\n" + "+\t * We need this for PCI devices only (Cardbus, PCI, miniPCI)\n" + "+\t * _and_ if on non-uniprocessor systems (Multiprocessor/HT).\n" + "+\t * This means we use it for all AR5416 devices, and the few\n" + "+\t * minor PCI AR9280 devices out there.\n" + "+\t *\n" + "+\t * Serialization is required because these devices do not handle\n" + "+\t * well the case of two concurrent reads/writes due to the latency\n" + "+\t * involved. During one read/write another read/write can be issued\n" + "+\t * on another CPU while the previous read/write may still be working\n" + "+\t * on our hardware, if we hit this case the hardware poops in a loop.\n" + "+\t * We prevent this by serializing reads and writes.\n" + "+\t *\n" + "+\t * This issue is not present on PCI-Express devices or pre-AR5416\n" + "+\t * devices (legacy, 802.11abg).\n" + "+\t */\n" + "+ if (num_possible_cpus() > 1)\n" + "+ ah->ah_config.serialize_regmode = SER_REG_MODE_AUTO;\n" + " }\n" + " \n" + static inline void ath9k_hw_override_ini(struct ath_hal *ah, -a12b537a00aa4efa02d20ba7f3af6da1b18a012d4a7e1e47cc635bdfba251668 +11ea8cda583a5045cc7d8cf598fec905fd93474b5c332400034b777e51081eba
diff --git a/a/1.txt b/N2/1.txt index d4bd848..de4bba5 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,3 +1,126 @@ -An embedded and charset-unspecified text was scrubbed... -Name: ath9k-implement-io-serialization.patch -Url: http://lists.ath9k.org/pipermail/ath9k-devel/attachments/20090429/0eacbaf6/attachment.txt +2.6.27-stable review patch. If anyone has any objections, please let us know. + +------------------ + +From: Luis R. Rodriguez <lrodriguez@atheros.com> + +This is a port of: +commit SHA1 6158425be398936af1fd04451f78ffad01529cb0 +for 2.6.27 + +All 802.11n PCI devices (Cardbus, PCI, mini-PCI) require +serialization of IO when on non-uniprocessor systems. PCI +express devices not not require this. + +This should fix our only last standing open ath9k kernel.org +bugzilla bug report: + +http://bugzilla.kernel.org/show_bug.cgi?id=12110 + +Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +--- + drivers/net/wireless/ath9k/ath9k.h | 4 ++-- + drivers/net/wireless/ath9k/core.c | 1 + + drivers/net/wireless/ath9k/core.h | 33 +++++++++++++++++++++++++++++++++ + drivers/net/wireless/ath9k/hw.c | 19 +++++++++++++++++++ + 4 files changed, 55 insertions(+), 2 deletions(-) + +--- a/drivers/net/wireless/ath9k/ath9k.h ++++ b/drivers/net/wireless/ath9k/ath9k.h +@@ -591,8 +591,8 @@ struct ath9k_country_entry { + u8 iso[3]; + }; + +-#define REG_WRITE(_ah, _reg, _val) iowrite32(_val, _ah->ah_sh + _reg) +-#define REG_READ(_ah, _reg) ioread32(_ah->ah_sh + _reg) ++#define REG_WRITE(_ah, _reg, _val) ath9k_iowrite32((_ah), (_reg), (_val)) ++#define REG_READ(_ah, _reg) ath9k_ioread32((_ah), (_reg)) + + #define SM(_v, _f) (((_v) << _f##_S) & _f) + #define MS(_v, _f) (((_v) & _f) >> _f##_S) +--- a/drivers/net/wireless/ath9k/core.c ++++ b/drivers/net/wireless/ath9k/core.c +@@ -1120,6 +1120,7 @@ int ath_init(u16 devid, struct ath_softc + sc->sc_cachelsz = csz << 2; /* convert to bytes */ + + spin_lock_init(&sc->sc_resetlock); ++ spin_lock_init(&sc->sc_serial_rw); + + ah = ath9k_hw_attach(devid, sc, sc->mem, &status); + if (ah == NULL) { +--- a/drivers/net/wireless/ath9k/core.h ++++ b/drivers/net/wireless/ath9k/core.h +@@ -1022,6 +1022,7 @@ struct ath_softc { + spinlock_t sc_rxbuflock; + spinlock_t sc_txbuflock; + spinlock_t sc_resetlock; ++ spinlock_t sc_serial_rw; + spinlock_t node_lock; + }; + +@@ -1069,4 +1070,36 @@ void ath_skb_unmap_single(struct ath_sof + void ath_mcast_merge(struct ath_softc *sc, u32 mfilt[2]); + enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc); + ++/* ++ * Read and write, they both share the same lock. We do this to serialize ++ * reads and writes on Atheros 802.11n PCI devices only. This is required ++ * as the FIFO on these devices can only accept sanely 2 requests. After ++ * that the device goes bananas. Serializing the reads/writes prevents this ++ * from happening. ++ */ ++ ++static inline void ath9k_iowrite32(struct ath_hal *ah, u32 reg_offset, u32 val) ++{ ++ if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) { ++ unsigned long flags; ++ spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags); ++ iowrite32(val, ah->ah_sc->mem + reg_offset); ++ spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags); ++ } else ++ iowrite32(val, ah->ah_sc->mem + reg_offset); ++} ++ ++static inline unsigned int ath9k_ioread32(struct ath_hal *ah, u32 reg_offset) ++{ ++ u32 val; ++ if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) { ++ unsigned long flags; ++ spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags); ++ val = ioread32(ah->ah_sc->mem + reg_offset); ++ spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags); ++ } else ++ val = ioread32(ah->ah_sc->mem + reg_offset); ++ return val; ++} ++ + #endif /* CORE_H */ +--- a/drivers/net/wireless/ath9k/hw.c ++++ b/drivers/net/wireless/ath9k/hw.c +@@ -369,6 +369,25 @@ static void ath9k_hw_set_defaults(struct + } + + ah->ah_config.intr_mitigation = 0; ++ ++ /* ++ * We need this for PCI devices only (Cardbus, PCI, miniPCI) ++ * _and_ if on non-uniprocessor systems (Multiprocessor/HT). ++ * This means we use it for all AR5416 devices, and the few ++ * minor PCI AR9280 devices out there. ++ * ++ * Serialization is required because these devices do not handle ++ * well the case of two concurrent reads/writes due to the latency ++ * involved. During one read/write another read/write can be issued ++ * on another CPU while the previous read/write may still be working ++ * on our hardware, if we hit this case the hardware poops in a loop. ++ * We prevent this by serializing reads and writes. ++ * ++ * This issue is not present on PCI-Express devices or pre-AR5416 ++ * devices (legacy, 802.11abg). ++ */ ++ if (num_possible_cpus() > 1) ++ ah->ah_config.serialize_regmode = SER_REG_MODE_AUTO; + } + + static inline void ath9k_hw_override_ini(struct ath_hal *ah, diff --git a/a/content_digest b/N2/content_digest index ab77d6d..1e44abf 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,13 +1,158 @@ "ref\020090429220659.339950874@mini.kroah.org\0" "ref\020090429221657.GA11765@kroah.com\0" "From\0Greg KH <gregkh@suse.de>\0" - "Subject\0[ath9k-devel] [patch 47/58] ath9k: implement IO serialization\0" + "Subject\0[patch 47/58] ath9k: implement IO serialization\0" "Date\0Wed, 29 Apr 2009 15:07:46 -0700\0" - "To\0ath9k-devel@lists.ath9k.org\0" + "To\0linux-kernel@vger.kernel.org" + " stable@kernel.org\0" + "Cc\0Justin Forbes <jmforbes@linuxtx.org>" + Zwane Mwaikambo <zwane@arm.linux.org.uk> + Theodore Ts'o <tytso@mit.edu> + Randy Dunlap <rdunlap@xenotime.net> + Dave Jones <davej@redhat.com> + Chuck Wolber <chuckw@quantumlinux.com> + Chris Wedgwood <reviews@ml.cw.f00f.org> + Michael Krufky <mkrufky@linuxtv.org> + Chuck Ebbert <cebbert@redhat.com> + Domenico Andreoli <cavokz@gmail.com> + Willy Tarreau <w@1wt.eu> + Rodrigo Rubira Branco <rbranco@la.checkpoint.com> + Jake Edge <jake@lwn.net> + Eugene Teo <eteo@redhat.com> + torvalds@linux-foundation.org + akpm@linux-foundation.org + alan@lxorguk.ukuu.org.uk + Luis R. Rodriguez <lrodriguez@atheros.com> + ath9k-devel@venema.h4ckr.net + " linux-wireless@vger.kernel.org\0" "\00:1\0" + "fn\0ath9k-implement-io-serialization.patch\0" "b\0" - "An embedded and charset-unspecified text was scrubbed...\n" - "Name: ath9k-implement-io-serialization.patch\n" - Url: http://lists.ath9k.org/pipermail/ath9k-devel/attachments/20090429/0eacbaf6/attachment.txt + "2.6.27-stable review patch. If anyone has any objections, please let us know.\n" + "\n" + "------------------\n" + "\n" + "From: Luis R. Rodriguez <lrodriguez@atheros.com>\n" + "\n" + "This is a port of:\n" + "commit SHA1 6158425be398936af1fd04451f78ffad01529cb0\n" + "for 2.6.27\n" + "\n" + "All 802.11n PCI devices (Cardbus, PCI, mini-PCI) require\n" + "serialization of IO when on non-uniprocessor systems. PCI\n" + "express devices not not require this.\n" + "\n" + "This should fix our only last standing open ath9k kernel.org\n" + "bugzilla bug report:\n" + "\n" + "http://bugzilla.kernel.org/show_bug.cgi?id=12110\n" + "\n" + "Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>\n" + "Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>\n" + "---\n" + " drivers/net/wireless/ath9k/ath9k.h | 4 ++--\n" + " drivers/net/wireless/ath9k/core.c | 1 +\n" + " drivers/net/wireless/ath9k/core.h | 33 +++++++++++++++++++++++++++++++++\n" + " drivers/net/wireless/ath9k/hw.c | 19 +++++++++++++++++++\n" + " 4 files changed, 55 insertions(+), 2 deletions(-)\n" + "\n" + "--- a/drivers/net/wireless/ath9k/ath9k.h\n" + "+++ b/drivers/net/wireless/ath9k/ath9k.h\n" + "@@ -591,8 +591,8 @@ struct ath9k_country_entry {\n" + " \tu8 iso[3];\n" + " };\n" + " \n" + "-#define REG_WRITE(_ah, _reg, _val) iowrite32(_val, _ah->ah_sh + _reg)\n" + "-#define REG_READ(_ah, _reg) ioread32(_ah->ah_sh + _reg)\n" + "+#define REG_WRITE(_ah, _reg, _val) ath9k_iowrite32((_ah), (_reg), (_val))\n" + "+#define REG_READ(_ah, _reg) ath9k_ioread32((_ah), (_reg))\n" + " \n" + " #define SM(_v, _f) (((_v) << _f##_S) & _f)\n" + " #define MS(_v, _f) (((_v) & _f) >> _f##_S)\n" + "--- a/drivers/net/wireless/ath9k/core.c\n" + "+++ b/drivers/net/wireless/ath9k/core.c\n" + "@@ -1120,6 +1120,7 @@ int ath_init(u16 devid, struct ath_softc\n" + " \tsc->sc_cachelsz = csz << 2;\t/* convert to bytes */\n" + " \n" + " \tspin_lock_init(&sc->sc_resetlock);\n" + "+\tspin_lock_init(&sc->sc_serial_rw);\n" + " \n" + " \tah = ath9k_hw_attach(devid, sc, sc->mem, &status);\n" + " \tif (ah == NULL) {\n" + "--- a/drivers/net/wireless/ath9k/core.h\n" + "+++ b/drivers/net/wireless/ath9k/core.h\n" + "@@ -1022,6 +1022,7 @@ struct ath_softc {\n" + " \tspinlock_t sc_rxbuflock;\n" + " \tspinlock_t sc_txbuflock;\n" + " \tspinlock_t sc_resetlock;\n" + "+\tspinlock_t sc_serial_rw;\n" + " \tspinlock_t node_lock;\n" + " };\n" + " \n" + "@@ -1069,4 +1070,36 @@ void ath_skb_unmap_single(struct ath_sof\n" + " void ath_mcast_merge(struct ath_softc *sc, u32 mfilt[2]);\n" + " enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc);\n" + " \n" + "+/*\n" + "+ * Read and write, they both share the same lock. We do this to serialize\n" + "+ * reads and writes on Atheros 802.11n PCI devices only. This is required\n" + "+ * as the FIFO on these devices can only accept sanely 2 requests. After\n" + "+ * that the device goes bananas. Serializing the reads/writes prevents this\n" + "+ * from happening.\n" + "+ */\n" + "+\n" + "+static inline void ath9k_iowrite32(struct ath_hal *ah, u32 reg_offset, u32 val)\n" + "+{\n" + "+\tif (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {\n" + "+\t\tunsigned long flags;\n" + "+\t\tspin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);\n" + "+\t\tiowrite32(val, ah->ah_sc->mem + reg_offset);\n" + "+\t\tspin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);\n" + "+\t} else\n" + "+\t\tiowrite32(val, ah->ah_sc->mem + reg_offset);\n" + "+}\n" + "+\n" + "+static inline unsigned int ath9k_ioread32(struct ath_hal *ah, u32 reg_offset)\n" + "+{\n" + "+\tu32 val;\n" + "+\tif (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {\n" + "+\t\tunsigned long flags;\n" + "+\t\tspin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);\n" + "+\t\tval = ioread32(ah->ah_sc->mem + reg_offset);\n" + "+\t\tspin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);\n" + "+\t} else\n" + "+\t\tval = ioread32(ah->ah_sc->mem + reg_offset);\n" + "+\treturn val;\n" + "+}\n" + "+\n" + " #endif /* CORE_H */\n" + "--- a/drivers/net/wireless/ath9k/hw.c\n" + "+++ b/drivers/net/wireless/ath9k/hw.c\n" + "@@ -369,6 +369,25 @@ static void ath9k_hw_set_defaults(struct\n" + " \t}\n" + " \n" + " \tah->ah_config.intr_mitigation = 0;\n" + "+\n" + "+\t/*\n" + "+\t * We need this for PCI devices only (Cardbus, PCI, miniPCI)\n" + "+\t * _and_ if on non-uniprocessor systems (Multiprocessor/HT).\n" + "+\t * This means we use it for all AR5416 devices, and the few\n" + "+\t * minor PCI AR9280 devices out there.\n" + "+\t *\n" + "+\t * Serialization is required because these devices do not handle\n" + "+\t * well the case of two concurrent reads/writes due to the latency\n" + "+\t * involved. During one read/write another read/write can be issued\n" + "+\t * on another CPU while the previous read/write may still be working\n" + "+\t * on our hardware, if we hit this case the hardware poops in a loop.\n" + "+\t * We prevent this by serializing reads and writes.\n" + "+\t *\n" + "+\t * This issue is not present on PCI-Express devices or pre-AR5416\n" + "+\t * devices (legacy, 802.11abg).\n" + "+\t */\n" + "+ if (num_possible_cpus() > 1)\n" + "+ ah->ah_config.serialize_regmode = SER_REG_MODE_AUTO;\n" + " }\n" + " \n" + static inline void ath9k_hw_override_ini(struct ath_hal *ah, -a12b537a00aa4efa02d20ba7f3af6da1b18a012d4a7e1e47cc635bdfba251668 +570230bda84da7e150740010d556cae514fc3321309f2818667ac412b6657588
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