From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1762755AbZD2WnW (ORCPT ); Wed, 29 Apr 2009 18:43:22 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1760250AbZD2WWE (ORCPT ); Wed, 29 Apr 2009 18:22:04 -0400 Received: from kroah.org ([198.145.64.141]:40800 "EHLO coco.kroah.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760040AbZD2WVy (ORCPT ); Wed, 29 Apr 2009 18:21:54 -0400 X-Mailbox-Line: From gregkh@mini.kroah.org Wed Apr 29 15:09:31 2009 Message-Id: <20090429220930.974826191@mini.kroah.org> User-Agent: quilt/0.48-1 Date: Wed, 29 Apr 2009 15:07:53 -0700 From: Greg KH To: linux-kernel@vger.kernel.org, stable@kernel.org Cc: Justin Forbes , Zwane Mwaikambo , "Theodore Ts'o" , Randy Dunlap , Dave Jones , Chuck Wolber , Chris Wedgwood , Michael Krufky , Chuck Ebbert , Domenico Andreoli , Willy Tarreau , Rodrigo Rubira Branco , Jake Edge , Eugene Teo , torvalds@linux-foundation.org, akpm@linux-foundation.org, alan@lxorguk.ukuu.org.uk, Yu Zhao , Jesse Barnes Subject: [patch 54/58] PCI: fix incorrect mask of PM No_Soft_Reset bit References: <20090429220659.339950874@mini.kroah.org> Content-Disposition: inline; filename=pci-fix-incorrect-mask-of-pm-no_soft_reset-bit.patch In-Reply-To: <20090429221657.GA11765@kroah.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2.6.27-stable review patch. If anyone has any objections, please let us know. ------------------ From: Yu Zhao commit 998dd7c719f62dcfa91d7bf7f4eb9c160e03d817 upstream. Reviewed-by: Matthew Wilcox Signed-off-by: Yu Zhao Signed-off-by: Jesse Barnes Signed-off-by: Greg Kroah-Hartman --- include/linux/pci_regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -234,7 +234,7 @@ #define PCI_PM_CAP_PME_SHIFT 11 /* Start of the PME Mask in PMC */ #define PCI_PM_CTRL 4 /* PM control and status register */ #define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */ -#define PCI_PM_CTRL_NO_SOFT_RESET 0x0004 /* No reset for D3hot->D0 */ +#define PCI_PM_CTRL_NO_SOFT_RESET 0x0008 /* No reset for D3hot->D0 */ #define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */ #define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (??) */ #define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (??) */