From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Brook Subject: Re: [Qemu-devel] [PATCH] qemu: msi irq allocation api Date: Thu, 21 May 2009 11:34:11 +0100 Message-ID: <200905211134.21184.paul@codesourcery.com> References: <20090520162130.GA22109@redhat.com> <200905211109.09844.paul@codesourcery.com> <4A152B8D.5020006@redhat.com> Mime-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Cc: Avi Kivity , Carsten Otte , kvm@vger.kernel.org, "Michael S. Tsirkin" , Rusty Russell , virtualization@lists.linux-foundation.org, Christian Borntraeger To: qemu-devel@nongnu.org Return-path: Received: from mail.codesourcery.com ([65.74.133.4]:49951 "EHLO mail.codesourcery.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751723AbZEUKeX (ORCPT ); Thu, 21 May 2009 06:34:23 -0400 In-Reply-To: <4A152B8D.5020006@redhat.com> Content-Disposition: inline Sender: kvm-owner@vger.kernel.org List-ID: > The PCI bus doesn't need any special support (I think) but something on > the other end needs to interpret those writes. Sure. But there's definitely nothing PCI specific about it. I assumed this would all be contained within the APIC. > In any case we need some internal API for this, and qemu_irq looks like > a good choice. What do you expect to be using this API? Paul