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From: Yong Wang <yong.y.wang@linux.intel.com>
To: Ingo Molnar <mingo@elte.hu>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>,
	Thomas Gleixner <tglx@linutronix.de>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH -tip] perf_counter/x86: Fix incorrect default branch
Date: Tue, 9 Jun 2009 21:32:32 +0800	[thread overview]
Message-ID: <20090609133232.GA14642@ywang-moblin2.bj.intel.com> (raw)
In-Reply-To: <20090609132313.GE25586@elte.hu>

On Tue, Jun 09, 2009 at 03:23:13PM +0200, Ingo Molnar wrote:
> 
> * Yong Wang <yong.y.wang@linux.intel.com> wrote:
> 
> > The event selector and UMASK values of Nehalem do not apply to all 
> > Intel processors.
> 
> The idea was to offer _some_ sort of table on new CPUs, instead of 
> nothing...
> 
> Eventually Intel stops changing those model specific index values in 
> future CPUs and puts them into architectural perfmon, for 
> fundamental stats like L1/LLC cache statistics.
> 
> In that case defaulting to the latest (known) enumeration might work 
> out to be just the thing used by all future CPUs.
> 
> So this is a subtle hint ;-)
> 

I see what you mean. You talked about future cpus. But what about those
old ones that are not atom, core2 or nehalem? Forget about them?

Thanks
-Yong

  reply	other threads:[~2009-06-09 13:49 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-06-09  7:46 [PATCH -tip] perf_counter/x86: Fix incorrect default branch Yong Wang
2009-06-09 13:23 ` Ingo Molnar
2009-06-09 13:32   ` Yong Wang [this message]
2009-06-09 14:25     ` Ingo Molnar
2009-06-10  5:15       ` Yong Wang
2009-06-10 10:44         ` Ingo Molnar

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