[PATCH 3/3] AMD IOMMU: add s3 suspend & resume support

[Wei Wang2 <wei.wang2@amd.com>]

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Add suspend and resume support for amd iommu.

Signed-off-by: Wei Wang <wei.wang2@amd.com>
--
 AMD GmbH, Germany
 Operating System Research Center
 
 Legal Information:
 Advanced Micro Devices GmbH
 Karl-Hammerschmidt-Str. 34
 85609 Dornach b. München
 
 Geschäftsführer: Jochen Polster, Thomas M. McCoy, Giuliano Meroni
 Sitz: Dornach, Gemeinde Aschheim, Landkreis München
 Registergericht München, HRB Nr. 43632

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diff -r 785dfbf2c01f xen/drivers/passthrough/amd/iommu_init.c
--- a/xen/drivers/passthrough/amd/iommu_init.c	Fri Jul 03 14:14:31 2009 +0200
+++ b/xen/drivers/passthrough/amd/iommu_init.c	Fri Jul 03 14:18:57 2009 +0200
@@ -716,3 +716,83 @@ error_out:
     }
     return -ENOMEM;
 }
+
+static void disable_iommu(struct amd_iommu *iommu)
+{
+    unsigned long flags;
+
+    spin_lock_irqsave(&iommu->lock, flags);
+
+    if ( !iommu->enabled )
+    {
+        spin_unlock_irqrestore(&iommu->lock, flags); 
+        return;
+    }
+
+    amd_iommu_msi_enable(iommu, IOMMU_CONTROL_DISABLED);
+    set_iommu_command_buffer_control(iommu, IOMMU_CONTROL_DISABLED);
+    set_iommu_event_log_control(iommu, IOMMU_CONTROL_DISABLED);
+    set_iommu_translation_control(iommu, IOMMU_CONTROL_DISABLED);
+
+    iommu->enabled = 0;
+
+    spin_unlock_irqrestore(&iommu->lock, flags);
+
+}
+
+static void invalidate_all_domain_pages(void)
+{
+    struct domain *d;
+    for_each_domain( d )
+        invalidate_all_iommu_pages(d);
+}
+
+static void invalidate_all_devices(void)
+{
+    u16 bus, devfn, bdf, req_id;
+    unsigned long flags;
+    struct amd_iommu *iommu;
+
+    for ( bdf = 0; bdf < ivrs_bdf_entries; bdf++ )
+    {
+        bus = bdf >> 8;
+        devfn = bdf & 0xFF;
+        iommu = find_iommu_for_device(bus, devfn);
+        req_id = ivrs_mappings[bdf].dte_requestor_id;
+        if ( iommu )
+        {
+            spin_lock_irqsave(&iommu->lock, flags);
+            invalidate_dev_table_entry(iommu, req_id);
+            invalidate_interrupt_table(iommu, req_id);
+            flush_command_buffer(iommu);
+            spin_unlock_irqrestore(&iommu->lock, flags);
+        }
+    }
+}
+
+void amd_iommu_suspend(void)
+{
+    struct amd_iommu *iommu;
+
+    for_each_amd_iommu ( iommu )
+        disable_iommu(iommu);
+}
+
+void amd_iommu_resume(void)
+{
+    struct amd_iommu *iommu;
+
+    for_each_amd_iommu ( iommu )
+    {
+       /*
+        * To make sure that iommus have not been touched 
+        * before re-enablement
+        */
+        disable_iommu(iommu);
+        enable_iommu(iommu);
+    }
+
+    /* flush all cache entries after iommu re-enabled */
+    invalidate_all_devices();
+    invalidate_all_domain_pages();
+}

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