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From: Paul Brook <paul@codesourcery.com>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>
Subject: Re: [Qemu-devel] Re: [Qemu-commits] [COMMIT e813376] Sparc32: fix fdc io_base
Date: Fri, 17 Jul 2009 15:58:31 +0100	[thread overview]
Message-ID: <200907171558.32607.paul@codesourcery.com> (raw)
In-Reply-To: <4A60899E.6020108@codemonkey.ws>

> >      .qdev.props = (Property[]) {
> >          {
> >              .name = "io_base",
> > -            .info = &qdev_prop_uint32,
> > +            .info = &qdev_prop_taddr,
>
> fdc probably shouldn't use target_phys_addr_t and instead should just
> use a uint64_t for io_base.  target_phys is a CPU type, devices
> shouldn't depend on it.

The qdev support for this device is almost completely bogus.  The device code 
should not be dealing with the base address at all. It should be handled by a 
SysBus MMIO region. fdctrl_init should not be calling fdctrl_init_common. 
Instead everything should be done by the qdev init routine (fdctrl_init1).

The mem_mapped property is also fairly suspect. We almost certainly want two 
different devices. On SysBus device a MMIO region, and the other an ISA device 
(using IO ports) - Note that qdev ISA bus support does not exist yet.

Paul

  reply	other threads:[~2009-07-17 14:58 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <200907171104.n6HB4EDY011438@d01av04.pok.ibm.com>
2009-07-17 14:24 ` [Qemu-devel] Re: [Qemu-commits] [COMMIT e813376] Sparc32: fix fdc io_base Anthony Liguori
2009-07-17 14:58   ` Paul Brook [this message]
2009-07-17 17:37     ` Blue Swirl
2009-07-17 19:29     ` Blue Swirl
2009-07-17 23:37       ` Paul Brook
2009-07-18  8:25         ` Blue Swirl
2009-07-17 17:28   ` Blue Swirl

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