From: Wei Wang2 <wei.wang2@amd.com>
To: xen-devel@lists.xensource.com
Subject: [PATCH] passthru: Fix pci bar remapping for passthru devices
Date: Mon, 20 Jul 2009 16:03:56 +0200 [thread overview]
Message-ID: <200907201603.56725.wei.wang2@amd.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 822 bytes --]
Hi,
When guest code tries to get the block size of mmio, it will write all "1"s
into pci bar register and then qemu will return all "0"s to the don't care
bits in the emulated bar register to indicate the block size to guest code.
In this case, we should not create p2m mapping in pt_bar_reg_write() and
pt_exp_rom_bar_reg_write(). Attached patch fixes this issue, additional
comment can be found in the patch.
Thanks,
Wei
Signed-off-by: Wei Wang <wei.wang2@amd.com>
--
AMD GmbH, Germany
Operating System Research Center
Legal Information:
Advanced Micro Devices GmbH
Karl-Hammerschmidt-Str. 34
85609 Dornach b. München
Geschäftsführer: Jochen Polster, Thomas M. McCoy, Giuliano Meroni
Sitz: Dornach, Gemeinde Aschheim, Landkreis München
Registergericht München, HRB Nr. 43632
[-- Attachment #2: mmio.patch --]
[-- Type: text/x-diff, Size: 1710 bytes --]
diff --git a/hw/pass-through.c b/hw/pass-through.c
index 51a39db..009b902 100644
--- a/hw/pass-through.c
+++ b/hw/pass-through.c
@@ -3177,7 +3177,16 @@ static int pt_bar_reg_write(struct pt_dev *ptdev,
}
/* update the corresponding virtual region address */
- r->addr = cfg_entry->data;
+ /*
+ * When guest code tries to get block size of mmio, it will write all "1"s
+ * into pci bar register. In this case, cfg_entry->data == writable_mask.
+ * Especially for devices with large mmio, the value of writable_mask
+ * is likely to be a guest physical address that has been mapped to ram
+ * rather than mmio. Remapping this value to mmio should be prevented.
+ */
+
+ if ( cfg_entry->data != writable_mask )
+ r->addr = cfg_entry->data;
exit:
/* create value for writing to I/O device register */
@@ -3229,7 +3238,16 @@ static int pt_exp_rom_bar_reg_write(struct pt_dev *ptdev,
cfg_entry->data = PT_MERGE_VALUE(*value, cfg_entry->data, writable_mask);
/* update the corresponding virtual region address */
- r->addr = cfg_entry->data;
+ /*
+ * When guest code tries to get block size of mmio, it will write all "1"s
+ * into pci bar register. In this case, cfg_entry->data == writable_mask.
+ * Especially for devices with large mmio, the value of writable_mask
+ * is likely to be a guest physical address that has been mapped to ram
+ * rather than mmio. Remapping this value to mmio should be prevented.
+ */
+
+ if ( cfg_entry->data != writable_mask )
+ r->addr = cfg_entry->data;
/* create value for writing to I/O device register */
throughable_mask = ~bar_emu_mask & valid_mask;
[-- Attachment #3: Type: text/plain, Size: 138 bytes --]
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next reply other threads:[~2009-07-20 14:03 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-07-20 14:03 Wei Wang2 [this message]
2009-07-20 14:26 ` [PATCH] passthru: Fix pci bar remapping for passthru devices Jiang, Yunhong
2009-07-20 14:47 ` Wei Wang2
2009-07-20 15:48 ` Jiang, Yunhong
2009-07-20 16:29 ` Wei Wang2
2009-07-21 9:06 ` Jiang, Yunhong
2009-07-21 14:31 ` Ian Jackson
2009-07-20 14:48 ` Keir Fraser
2009-07-20 15:49 ` Jiang, Yunhong
2009-07-20 23:39 ` Kay, Allen M
2009-07-21 9:57 ` Wei Wang2
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