From: Andreas Herrmann <andreas.herrmann3@amd.com>
To: Ingo Molnar <mingo@elte.hu>, Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>
Cc: linux-kernel@vger.kernel.org, Borislav Petkov <borislav.petkov@amd.com>
Subject: [PATCH 4/5] x86, cacheinfo: Fixup L3 cache information for AMD multi-node processors
Date: Wed, 5 Aug 2009 17:50:10 +0200 [thread overview]
Message-ID: <20090805155010.GE6520@alberich.amd.com> (raw)
In-Reply-To: <20090805154402.GA6520@alberich.amd.com>
L3 cache size, associativity and shared_cpu information need to be
adapted to show information for an internal node instead of the
entire physical package.
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
arch/x86/kernel/cpu/intel_cacheinfo.c | 30 ++++++++++++++++++++----------
1 files changed, 20 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 306bf0d..17f4c8b 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -241,7 +241,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
case 0:
if (!l1->val)
return;
- assoc = l1->assoc;
+ assoc = assocs[l1->assoc];
line_size = l1->line_size;
lines_per_tag = l1->lines_per_tag;
size_in_kb = l1->size_in_kb;
@@ -249,7 +249,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
case 2:
if (!l2.val)
return;
- assoc = l2.assoc;
+ assoc = assocs[l2.assoc];
line_size = l2.line_size;
lines_per_tag = l2.lines_per_tag;
/* cpu_data has errata corrections for K7 applied */
@@ -258,10 +258,14 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
case 3:
if (!l3.val)
return;
- assoc = l3.assoc;
+ assoc = assocs[l3.assoc];
line_size = l3.line_size;
lines_per_tag = l3.lines_per_tag;
size_in_kb = l3.size_encoded * 512;
+ if (boot_cpu_has(X86_FEATURE_AMD_DCM)) {
+ size_in_kb = size_in_kb >> 1;
+ assoc = assoc >> 1;
+ }
break;
default:
return;
@@ -270,18 +274,14 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
eax->split.is_self_initializing = 1;
eax->split.type = types[leaf];
eax->split.level = levels[leaf];
- if (leaf == 3)
- eax->split.num_threads_sharing =
- current_cpu_data.x86_max_cores - 1;
- else
- eax->split.num_threads_sharing = 0;
+ eax->split.num_threads_sharing = 0;
eax->split.num_cores_on_die = current_cpu_data.x86_max_cores - 1;
- if (assoc == 0xf)
+ if (assoc == 0xffff)
eax->split.is_fully_associative = 1;
ebx->split.coherency_line_size = line_size - 1;
- ebx->split.ways_of_associativity = assocs[assoc] - 1;
+ ebx->split.ways_of_associativity = assoc - 1;
ebx->split.physical_line_partition = lines_per_tag - 1;
ecx->split.number_of_sets = (size_in_kb * 1024) / line_size /
(ebx->split.ways_of_associativity + 1) - 1;
@@ -523,6 +523,16 @@ static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
int index_msb, i;
struct cpuinfo_x86 *c = &cpu_data(cpu);
+ if ((index == 3) && (c->x86_vendor == X86_VENDOR_AMD)) {
+ for_each_online_cpu(i) {
+ if (!per_cpu(cpuid4_info, i))
+ continue;
+ this_leaf = CPUID4_INFO_IDX(i, index);
+ cpumask_copy(to_cpumask(this_leaf->shared_cpu_map),
+ topology_cpu_node_cpumask(i));
+ }
+ return;
+ }
this_leaf = CPUID4_INFO_IDX(cpu, index);
num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing;
--
1.6.3.3
next prev parent reply other threads:[~2009-08-05 15:53 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-05 15:44 [PATCH 0/5 v4] x86: Adapt CPU topology detection for AMD Magny-Cours Andreas Herrmann
2009-08-05 15:46 ` [PATCH 1/5] topology: Introduce cpu_node information for multi-node processors Andreas Herrmann
2009-08-05 15:48 ` [PATCH 2/5] x86: Provide CPU topology " Andreas Herrmann
2009-08-06 8:30 ` Stephen Rothwell
2009-08-06 16:15 ` Andreas Herrmann
2009-08-06 17:44 ` [PATCH] x86, smpboot: use zalloc_cpumask_var instead of alloc/clear Andreas Herrmann
2009-08-05 15:49 ` [PATCH 3/5] x86: Add cpu_node topology detection for AMD Magny-Cours Andreas Herrmann
2009-08-05 15:50 ` Andreas Herrmann [this message]
2009-08-05 15:51 ` [PATCH 5/5] x86, mcheck: Make use of cpu_node_mask instead of cpu_core_mask Andreas Herrmann
2009-08-05 20:23 ` [PATCH 0/5 v4] x86: Adapt CPU topology detection for AMD Magny-Cours Brice Goglin
2009-08-06 10:42 ` Andreas Herrmann
2009-08-06 12:25 ` Brice Goglin
2009-08-06 16:08 ` Andreas Herrmann
2009-08-06 17:29 ` [PATCH] x86, topology: Swap semantic of core_siblings and cpu_node_siblings Andreas Herrmann
2009-08-06 18:24 ` [PATCH] topology: Update CPU topology documentation Andreas Herrmann
2009-08-08 15:17 ` [PATCH 0/5 v4] x86: Adapt CPU topology detection for AMD Magny-Cours Ingo Molnar
2009-08-08 15:49 ` Brice Goglin
2009-08-21 10:34 ` Andreas Herrmann
-- strict thread matches above, loose matches on Subject: below --
2009-08-31 12:53 [PATCH 0/5 v6] " Andreas Herrmann
2009-08-31 13:01 ` [PATCH 4/5] x86, cacheinfo: Fixup L3 cache information for AMD multi-node processors Andreas Herrmann
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