From: David Brownell <david-b@pacbell.net>
To: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: s-paulraj@ti.com, linux-mtd@lists.infradead.org,
nsnehaprabha@ti.com, akpm@linux-foundation.org,
dwmw2@infradead.org, tglx@linutronix.de
Subject: Re: [patch 3/3] mtd-nand: DaVinci: Add 4-bit ECC support for large page NAND chips
Date: Thu, 27 Aug 2009 19:08:14 -0700 [thread overview]
Message-ID: <200908271908.15309.david-b@pacbell.net> (raw)
In-Reply-To: <4A7C865C.9050905@boundarydevices.com>
On Friday 07 August 2009, Troy Kisky wrote:
> > +static struct nand_ecclayout hwecc4_2048 __initconst = {
> > + ...
> > + .oobfree = {
> > + /* 1 byte at offset 0 holds manufacturer badblock marker */
> > + {.offset = 1, .length = 23, },
>
> I thought Sneha Narnakaje was going to change offset = 2, length = 22 ?
Not clear why; this is only for 8-bit NAND, which (right?)
only uses single byte manufacturer badblock markers ...
Will a TI person be updating U-Boot? Please? :)
During the U-Boot v2009.10 window, which opens up
in a couple days...
- Dave
next prev parent reply other threads:[~2009-08-28 5:59 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-07 18:24 [patch 3/3] mtd-nand: DaVinci: Add 4-bit ECC support for large page NAND chips akpm
2009-08-07 19:54 ` Troy Kisky
2009-08-07 19:57 ` Narnakaje, Snehaprabha
2009-08-28 2:08 ` David Brownell [this message]
2009-08-28 10:21 ` Paulraj, Sandeep
2009-09-03 21:48 ` David Brownell
2009-09-03 21:53 ` Paulraj, Sandeep
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