From: markus.t.metzger@intel.com
To: mingo@elte.hu, tglx@linutronix.de, hpa@zytor.com
Cc: markus.t.metzger@gmail.com, a.p.zijlstra@chello.nl,
linux-kernel@vger.kernel.org,
Markus Metzger <markus.t.metzger@intel.com>
Subject: [patch 2/3] x86, perf_counter, bts: correct pointer-to-u64 casts
Date: Wed, 02 Sep 2009 16:04:47 +0200 [thread overview]
Message-ID: <20090902140615.305889000@intel.com> (raw)
In-Reply-To: 20090902140445.125358000@intel.com
[-- Attachment #1: tip.master.perf_counter.correct_pointer_to_u64_casts.patch --]
[-- Type: text/plain, Size: 2296 bytes --]
On 32bit, pointers in the DS AREA configuration are cast to u64. The
current (long) cast to avoid compiler warnings results in a signed
64bit address.
Signed-off-by: Markus Metzger <markus.t.metzger@intel.com>
---
arch/x86/kernel/cpu/perf_counter.c | 24 12 + 12 - 0 !
1 files changed, 12 insertions(+), 12 deletions(-)
Index: b/arch/x86/kernel/cpu/perf_counter.c
===================================================================
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -726,7 +726,8 @@ static inline void init_debug_store_on_c
return;
wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA,
- (u32)((u64)(long)ds), (u32)((u64)(long)ds >> 32));
+ (u32)((u64)(unsigned long)ds),
+ (u32)((u64)(unsigned long)ds >> 32));
}
static inline void fini_debug_store_on_cpu(int cpu)
@@ -757,7 +758,7 @@ static void release_bts_hardware(void)
per_cpu(cpu_hw_counters, cpu).ds = NULL;
- kfree((void *)(long)ds->bts_buffer_base);
+ kfree((void *)(unsigned long)ds->bts_buffer_base);
kfree(ds);
}
@@ -788,7 +789,7 @@ static int reserve_bts_hardware(void)
break;
}
- ds->bts_buffer_base = (u64)(long)buffer;
+ ds->bts_buffer_base = (u64)(unsigned long)buffer;
ds->bts_index = ds->bts_buffer_base;
ds->bts_absolute_maximum =
ds->bts_buffer_base + BTS_BUFFER_SIZE;
@@ -1491,7 +1492,7 @@ static void intel_pmu_drain_bts_buffer(s
};
struct perf_counter *counter = cpuc->counters[X86_PMC_IDX_FIXED_BTS];
unsigned long orig_ip = data->regs->ip;
- u64 at;
+ struct bts_record *at, *top;
if (!counter)
return;
@@ -1499,19 +1500,18 @@ static void intel_pmu_drain_bts_buffer(s
if (!ds)
return;
- for (at = ds->bts_buffer_base;
- at < ds->bts_index;
- at += sizeof(struct bts_record)) {
- struct bts_record *rec = (struct bts_record *)(long)at;
+ at = (struct bts_record *)(unsigned long)ds->bts_buffer_base;
+ top = (struct bts_record *)(unsigned long)ds->bts_index;
- data->regs->ip = rec->from;
- data->addr = rec->to;
+ ds->bts_index = ds->bts_buffer_base;
+
+ for (; at < top; at++) {
+ data->regs->ip = at->from;
+ data->addr = at->to;
perf_counter_output(counter, 1, data);
}
- ds->bts_index = ds->bts_buffer_base;
-
data->regs->ip = orig_ip;
data->addr = 0;
--
[-- Attachment #2: Type: text/plain, Size: 656 bytes --]
---------------------------------------------------------------------
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen Germany
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Douglas Lusk, Peter Gleissner, Hannes Schwaderer
Registergericht: Muenchen HRB 47456 Ust.-IdNr.
VAT Registration No.: DE129385895
Citibank Frankfurt (BLZ 502 109 00) 600119052
This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.
next prev parent reply other threads:[~2009-09-02 14:06 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-09-02 14:04 [patch 0/3] x86, perf_counter, bts: incorporate review feedback and fix bugs markus.t.metzger
2009-09-02 14:04 ` [patch 1/3] x86, perf_counter, bts: fail if BTS is not available markus.t.metzger
2009-09-04 7:58 ` [tip:perfcounters/core] x86, perf_counter, bts: Fail " tip-bot for markus.t.metzger@intel.com
2009-09-02 14:04 ` markus.t.metzger [this message]
2009-09-04 7:58 ` [tip:perfcounters/core] x86, perf_counter, bts: Correct pointer-to-u64 casts tip-bot for markus.t.metzger@intel.com
2009-09-02 14:04 ` [patch 3/3] x86, perf_counter, bts: do not allow kernel BTS tracing markus.t.metzger
2009-09-04 7:58 ` [tip:perfcounters/core] x86, perf_counter, bts: Do not allow kernel BTS tracing for now tip-bot for markus.t.metzger@intel.com
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20090902140615.305889000@intel.com \
--to=markus.t.metzger@intel.com \
--cc=a.p.zijlstra@chello.nl \
--cc=hpa@zytor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=markus.t.metzger@gmail.com \
--cc=mingo@elte.hu \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.