From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Wang2 Subject: [PATCH] AMD IOMMU: Cleanup and minor feature enhancement Date: Thu, 17 Sep 2009 16:30:26 +0200 Message-ID: <200909171630.27531.wei.wang2@amd.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="Boundary-00=_DgksK6Ips+2QUx1" Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org --Boundary-00=_DgksK6Ips+2QUx1 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Hi, Attached patches are code cleanup and minor feature enhancement for amd iom= mu.=20 debug.patch: Allow enabling iommu debug output at run time. The old=20 compile-time option is removed.=20 optmz_intr.patch: If interrupt remapping is disabled, then do not update=20 interrupt remapping table with IOAPIC write. remove_def.patch: Remove unused definitions. comp_wait.patch: Extend the loop counter for polling completion wait bit. Thanks, =2DWei Signed-off-by: Wei Wang =2D-=20 Legal Information: Advanced Micro Devices GmbH Karl-Hammerschmidt-Str. 34 85609 Dornach b. M=FCnchen Gesch=E4ftsf=FChrer: Andrew Bowd, Thomas M. McCoy, Giuliano Meroni Sitz: Dornach, Gemeinde Aschheim, Landkreis M=FCnchen Registergericht M=FCnchen, HRB Nr. 43632 --Boundary-00=_DgksK6Ips+2QUx1 Content-Type: text/x-diff; charset="iso-8859-1"; name="debug.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="debug.patch" diff -r 72d130772f36 xen/drivers/passthrough/amd/iommu_acpi.c --- a/xen/drivers/passthrough/amd/iommu_acpi.c Wed Sep 16 09:30:41 2009 +0100 +++ b/xen/drivers/passthrough/amd/iommu_acpi.c Wed Sep 16 19:22:00 2009 +0200 @@ -181,7 +181,7 @@ static int __init register_exclusion_ran iommu = find_iommu_for_device(bdf); if ( !iommu ) { - amd_iov_error("IVMD Error: No IOMMU for Dev_Id 0x%x!\n", bdf); + AMD_IOMMU_DEBUG("IVMD Error: No IOMMU for Dev_Id 0x%x!\n", bdf); return -ENODEV; } req = ivrs_mappings[bdf].dte_requestor_id; @@ -261,7 +261,7 @@ static int __init parse_ivmd_device_sele bdf = ivmd_block->header.dev_id; if ( bdf >= ivrs_bdf_entries ) { - amd_iov_error("IVMD Error: Invalid Dev_Id 0x%x\n", bdf); + AMD_IOMMU_DEBUG("IVMD Error: Invalid Dev_Id 0x%x\n", bdf); return -ENODEV; } @@ -278,7 +278,7 @@ static int __init parse_ivmd_device_rang first_bdf = ivmd_block->header.dev_id; if ( first_bdf >= ivrs_bdf_entries ) { - amd_iov_error( + AMD_IOMMU_DEBUG( "IVMD Error: Invalid Range_First Dev_Id 0x%x\n", first_bdf); return -ENODEV; } @@ -286,7 +286,7 @@ static int __init parse_ivmd_device_rang last_bdf = ivmd_block->last_dev_id; if ( (last_bdf >= ivrs_bdf_entries) || (last_bdf <= first_bdf) ) { - amd_iov_error( + AMD_IOMMU_DEBUG( "IVMD Error: Invalid Range_Last Dev_Id 0x%x\n", last_bdf); return -ENODEV; } @@ -309,7 +309,7 @@ static int __init parse_ivmd_device_iomm ivmd_block->cap_offset); if ( !iommu ) { - amd_iov_error("IVMD Error: No IOMMU for Dev_Id 0x%x Cap 0x%x\n", + AMD_IOMMU_DEBUG("IVMD Error: No IOMMU for Dev_Id 0x%x Cap 0x%x\n", ivmd_block->header.dev_id, ivmd_block->cap_offset); return -ENODEV; } @@ -326,7 +326,7 @@ static int __init parse_ivmd_block(struc if ( ivmd_block->header.length < sizeof(struct acpi_ivmd_block_header) ) { - amd_iov_error("IVMD Error: Invalid Block Length!\n"); + AMD_IOMMU_DEBUG("IVMD Error: Invalid Block Length!\n"); return -ENODEV; } @@ -335,9 +335,9 @@ static int __init parse_ivmd_block(struc base = start_addr & PAGE_MASK; limit = (start_addr + mem_length - 1) & PAGE_MASK; - amd_iov_info("IVMD Block: Type 0x%x\n",ivmd_block->header.type); - amd_iov_info(" Start_Addr_Phys 0x%lx\n", start_addr); - amd_iov_info(" Mem_Length 0x%lx\n", mem_length); + AMD_IOMMU_DEBUG("IVMD Block: Type 0x%x\n",ivmd_block->header.type); + AMD_IOMMU_DEBUG(" Start_Addr_Phys 0x%lx\n", start_addr); + AMD_IOMMU_DEBUG(" Mem_Length 0x%lx\n", mem_length); if ( get_field_from_byte(ivmd_block->header.flags, AMD_IOMMU_ACPI_EXCLUSION_RANGE_MASK, @@ -356,7 +356,7 @@ static int __init parse_ivmd_block(struc } else { - amd_iov_error("IVMD Error: Invalid Flag Field!\n"); + AMD_IOMMU_DEBUG("IVMD Error: Invalid Flag Field!\n"); return -ENODEV; } @@ -379,7 +379,7 @@ static int __init parse_ivmd_block(struc base, limit, iw, ir); default: - amd_iov_error("IVMD Error: Invalid Block Type!\n"); + AMD_IOMMU_DEBUG("IVMD Error: Invalid Block Type!\n"); return -ENODEV; } } @@ -389,7 +389,7 @@ static u16 __init parse_ivhd_device_padd { if ( header_length < (block_length + pad_length) ) { - amd_iov_error("IVHD Error: Invalid Device_Entry Length!\n"); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device_Entry Length!\n"); return 0; } @@ -404,7 +404,7 @@ static u16 __init parse_ivhd_device_sele bdf = ivhd_device->header.dev_id; if ( bdf >= ivrs_bdf_entries ) { - amd_iov_error("IVHD Error: Invalid Device_Entry Dev_Id 0x%x\n", bdf); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device_Entry Dev_Id 0x%x\n", bdf); return 0; } @@ -422,14 +422,14 @@ static u16 __init parse_ivhd_device_rang dev_length = sizeof(struct acpi_ivhd_device_range); if ( header_length < (block_length + dev_length) ) { - amd_iov_error("IVHD Error: Invalid Device_Entry Length!\n"); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device_Entry Length!\n"); return 0; } if ( ivhd_device->range.trailer.type != AMD_IOMMU_ACPI_IVHD_DEV_RANGE_END ) { - amd_iov_error("IVHD Error: " + AMD_IOMMU_DEBUG("IVHD Error: " "Invalid Range: End_Type 0x%x\n", ivhd_device->range.trailer.type); return 0; @@ -438,7 +438,7 @@ static u16 __init parse_ivhd_device_rang first_bdf = ivhd_device->header.dev_id; if ( first_bdf >= ivrs_bdf_entries ) { - amd_iov_error( + AMD_IOMMU_DEBUG( "IVHD Error: Invalid Range: First Dev_Id 0x%x\n", first_bdf); return 0; } @@ -446,12 +446,12 @@ static u16 __init parse_ivhd_device_rang last_bdf = ivhd_device->range.trailer.dev_id; if ( (last_bdf >= ivrs_bdf_entries) || (last_bdf <= first_bdf) ) { - amd_iov_error( + AMD_IOMMU_DEBUG( "IVHD Error: Invalid Range: Last Dev_Id 0x%x\n", last_bdf); return 0; } - amd_iov_info(" Dev_Id Range: 0x%x -> 0x%x\n", first_bdf, last_bdf); + AMD_IOMMU_DEBUG(" Dev_Id Range: 0x%x -> 0x%x\n", first_bdf, last_bdf); for ( bdf = first_bdf; bdf <= last_bdf; bdf++ ) add_ivrs_mapping_entry(bdf, bdf, ivhd_device->header.flags, iommu); @@ -468,25 +468,25 @@ static u16 __init parse_ivhd_device_alia dev_length = sizeof(struct acpi_ivhd_device_alias); if ( header_length < (block_length + dev_length) ) { - amd_iov_error("IVHD Error: Invalid Device_Entry Length!\n"); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device_Entry Length!\n"); return 0; } bdf = ivhd_device->header.dev_id; if ( bdf >= ivrs_bdf_entries ) { - amd_iov_error("IVHD Error: Invalid Device_Entry Dev_Id 0x%x\n", bdf); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device_Entry Dev_Id 0x%x\n", bdf); return 0; } alias_id = ivhd_device->alias.dev_id; if ( alias_id >= ivrs_bdf_entries ) { - amd_iov_error("IVHD Error: Invalid Alias Dev_Id 0x%x\n", alias_id); - return 0; - } - - amd_iov_info(" Dev_Id Alias: 0x%x\n", alias_id); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Alias Dev_Id 0x%x\n", alias_id); + return 0; + } + + AMD_IOMMU_DEBUG(" Dev_Id Alias: 0x%x\n", alias_id); add_ivrs_mapping_entry(bdf, alias_id, ivhd_device->header.flags, iommu); @@ -503,14 +503,14 @@ static u16 __init parse_ivhd_device_alia dev_length = sizeof(struct acpi_ivhd_device_alias_range); if ( header_length < (block_length + dev_length) ) { - amd_iov_error("IVHD Error: Invalid Device_Entry Length!\n"); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device_Entry Length!\n"); return 0; } if ( ivhd_device->alias_range.trailer.type != AMD_IOMMU_ACPI_IVHD_DEV_RANGE_END ) { - amd_iov_error("IVHD Error: " + AMD_IOMMU_DEBUG("IVHD Error: " "Invalid Range: End_Type 0x%x\n", ivhd_device->alias_range.trailer.type); return 0; @@ -519,7 +519,7 @@ static u16 __init parse_ivhd_device_alia first_bdf = ivhd_device->header.dev_id; if ( first_bdf >= ivrs_bdf_entries ) { - amd_iov_error( + AMD_IOMMU_DEBUG( "IVHD Error: Invalid Range: First Dev_Id 0x%x\n", first_bdf); return 0; } @@ -527,7 +527,7 @@ static u16 __init parse_ivhd_device_alia last_bdf = ivhd_device->alias_range.trailer.dev_id; if ( last_bdf >= ivrs_bdf_entries || last_bdf <= first_bdf ) { - amd_iov_error( + AMD_IOMMU_DEBUG( "IVHD Error: Invalid Range: Last Dev_Id 0x%x\n", last_bdf); return 0; } @@ -535,12 +535,12 @@ static u16 __init parse_ivhd_device_alia alias_id = ivhd_device->alias_range.alias.dev_id; if ( alias_id >= ivrs_bdf_entries ) { - amd_iov_error("IVHD Error: Invalid Alias Dev_Id 0x%x\n", alias_id); - return 0; - } - - amd_iov_info(" Dev_Id Range: 0x%x -> 0x%x\n", first_bdf, last_bdf); - amd_iov_info(" Dev_Id Alias: 0x%x\n", alias_id); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Alias Dev_Id 0x%x\n", alias_id); + return 0; + } + + AMD_IOMMU_DEBUG(" Dev_Id Range: 0x%x -> 0x%x\n", first_bdf, last_bdf); + AMD_IOMMU_DEBUG(" Dev_Id Alias: 0x%x\n", alias_id); for ( bdf = first_bdf; bdf <= last_bdf; bdf++ ) add_ivrs_mapping_entry(bdf, alias_id, ivhd_device->header.flags, iommu); @@ -557,14 +557,14 @@ static u16 __init parse_ivhd_device_exte dev_length = sizeof(struct acpi_ivhd_device_extended); if ( header_length < (block_length + dev_length) ) { - amd_iov_error("IVHD Error: Invalid Device_Entry Length!\n"); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device_Entry Length!\n"); return 0; } bdf = ivhd_device->header.dev_id; if ( bdf >= ivrs_bdf_entries ) { - amd_iov_error("IVHD Error: Invalid Device_Entry Dev_Id 0x%x\n", bdf); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device_Entry Dev_Id 0x%x\n", bdf); return 0; } @@ -582,14 +582,14 @@ static u16 __init parse_ivhd_device_exte dev_length = sizeof(struct acpi_ivhd_device_extended_range); if ( header_length < (block_length + dev_length) ) { - amd_iov_error("IVHD Error: Invalid Device_Entry Length!\n"); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device_Entry Length!\n"); return 0; } if ( ivhd_device->extended_range.trailer.type != AMD_IOMMU_ACPI_IVHD_DEV_RANGE_END ) { - amd_iov_error("IVHD Error: " + AMD_IOMMU_DEBUG("IVHD Error: " "Invalid Range: End_Type 0x%x\n", ivhd_device->extended_range.trailer.type); return 0; @@ -598,7 +598,7 @@ static u16 __init parse_ivhd_device_exte first_bdf = ivhd_device->header.dev_id; if ( first_bdf >= ivrs_bdf_entries ) { - amd_iov_error( + AMD_IOMMU_DEBUG( "IVHD Error: Invalid Range: First Dev_Id 0x%x\n", first_bdf); return 0; } @@ -606,12 +606,12 @@ static u16 __init parse_ivhd_device_exte last_bdf = ivhd_device->extended_range.trailer.dev_id; if ( (last_bdf >= ivrs_bdf_entries) || (last_bdf <= first_bdf) ) { - amd_iov_error( + AMD_IOMMU_DEBUG( "IVHD Error: Invalid Range: Last Dev_Id 0x%x\n", last_bdf); return 0; } - amd_iov_info(" Dev_Id Range: 0x%x -> 0x%x\n", + AMD_IOMMU_DEBUG(" Dev_Id Range: 0x%x -> 0x%x\n", first_bdf, last_bdf); for ( bdf = first_bdf; bdf <= last_bdf; bdf++ ) @@ -629,14 +629,14 @@ static u16 __init parse_ivhd_device_spec dev_length = sizeof(struct acpi_ivhd_device_special); if ( header_length < (block_length + dev_length) ) { - amd_iov_error("IVHD Error: Invalid Device_Entry Length!\n"); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device_Entry Length!\n"); return 0; } bdf = ivhd_device->special.dev_id; if ( bdf >= ivrs_bdf_entries ) { - amd_iov_error("IVHD Error: Invalid Device_Entry Dev_Id 0x%x\n", bdf); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device_Entry Dev_Id 0x%x\n", bdf); return 0; } @@ -655,7 +655,7 @@ static int __init parse_ivhd_block(struc if ( ivhd_block->header.length < sizeof(struct acpi_ivhd_block_header) ) { - amd_iov_error("IVHD Error: Invalid Block Length!\n"); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Block Length!\n"); return -ENODEV; } @@ -663,7 +663,7 @@ static int __init parse_ivhd_block(struc ivhd_block->cap_offset); if ( !iommu ) { - amd_iov_error("IVHD Error: No IOMMU for Dev_Id 0x%x Cap 0x%x\n", + AMD_IOMMU_DEBUG("IVHD Error: No IOMMU for Dev_Id 0x%x Cap 0x%x\n", ivhd_block->header.dev_id, ivhd_block->cap_offset); return -ENODEV; } @@ -676,10 +676,10 @@ static int __init parse_ivhd_block(struc ivhd_device = (union acpi_ivhd_device *) ((u8 *)ivhd_block + block_length); - amd_iov_info( "IVHD Device Entry:\n"); - amd_iov_info( " Type 0x%x\n", ivhd_device->header.type); - amd_iov_info( " Dev_Id 0x%x\n", ivhd_device->header.dev_id); - amd_iov_info( " Flags 0x%x\n", ivhd_device->header.flags); + AMD_IOMMU_DEBUG( "IVHD Device Entry:\n"); + AMD_IOMMU_DEBUG( " Type 0x%x\n", ivhd_device->header.type); + AMD_IOMMU_DEBUG( " Dev_Id 0x%x\n", ivhd_device->header.dev_id); + AMD_IOMMU_DEBUG( " Flags 0x%x\n", ivhd_device->header.flags); switch ( ivhd_device->header.type ) { @@ -727,7 +727,7 @@ static int __init parse_ivhd_block(struc ivhd_block->header.length, block_length, iommu); break; default: - amd_iov_error("IVHD Error: Invalid Device Type!\n"); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device Type!\n"); dev_length = 0; break; } @@ -759,7 +759,7 @@ static int __init parse_ivrs_block(struc return parse_ivmd_block(ivmd_block); default: - amd_iov_error("IVRS Error: Invalid Block Type!\n"); + AMD_IOMMU_DEBUG("IVRS Error: Invalid Block Type!\n"); return -ENODEV; } @@ -768,39 +768,37 @@ static int __init parse_ivrs_block(struc static void __init dump_acpi_table_header(struct acpi_table_header *table) { -#ifdef AMD_IOV_DEBUG int i; - amd_iov_info("ACPI Table:\n"); - amd_iov_info(" Signature "); + AMD_IOMMU_DEBUG("ACPI Table:\n"); + AMD_IOMMU_DEBUG(" Signature "); for ( i = 0; i < ACPI_NAME_SIZE; i++ ) printk("%c", table->signature[i]); printk("\n"); - amd_iov_info(" Length 0x%x\n", table->length); - amd_iov_info(" Revision 0x%x\n", table->revision); - amd_iov_info(" CheckSum 0x%x\n", table->checksum); - - amd_iov_info(" OEM_Id "); + AMD_IOMMU_DEBUG(" Length 0x%x\n", table->length); + AMD_IOMMU_DEBUG(" Revision 0x%x\n", table->revision); + AMD_IOMMU_DEBUG(" CheckSum 0x%x\n", table->checksum); + + AMD_IOMMU_DEBUG(" OEM_Id "); for ( i = 0; i < ACPI_OEM_ID_SIZE; i++ ) printk("%c", table->oem_id[i]); printk("\n"); - amd_iov_info(" OEM_Table_Id "); + AMD_IOMMU_DEBUG(" OEM_Table_Id "); for ( i = 0; i < ACPI_OEM_TABLE_ID_SIZE; i++ ) printk("%c", table->oem_table_id[i]); printk("\n"); - amd_iov_info(" OEM_Revision 0x%x\n", table->oem_revision); - - amd_iov_info(" Creator_Id "); + AMD_IOMMU_DEBUG(" OEM_Revision 0x%x\n", table->oem_revision); + + AMD_IOMMU_DEBUG(" Creator_Id "); for ( i = 0; i < ACPI_NAME_SIZE; i++ ) printk("%c", table->asl_compiler_id[i]); printk("\n"); - amd_iov_info(" Creator_Revision 0x%x\n", + AMD_IOMMU_DEBUG(" Creator_Revision 0x%x\n", table->asl_compiler_revision); -#endif } @@ -813,7 +811,8 @@ static int __init parse_ivrs_table(struc BUG_ON(!table); - dump_acpi_table_header(table); + if ( amd_iommu_debug ) + dump_acpi_table_header(table); /* parse IVRS blocks */ length = sizeof(struct acpi_ivrs_table_header); @@ -822,15 +821,15 @@ static int __init parse_ivrs_table(struc ivrs_block = (struct acpi_ivrs_block_header *) ((u8 *)table + length); - amd_iov_info("IVRS Block:\n"); - amd_iov_info(" Type 0x%x\n", ivrs_block->type); - amd_iov_info(" Flags 0x%x\n", ivrs_block->flags); - amd_iov_info(" Length 0x%x\n", ivrs_block->length); - amd_iov_info(" Dev_Id 0x%x\n", ivrs_block->dev_id); + AMD_IOMMU_DEBUG("IVRS Block:\n"); + AMD_IOMMU_DEBUG(" Type 0x%x\n", ivrs_block->type); + AMD_IOMMU_DEBUG(" Flags 0x%x\n", ivrs_block->flags); + AMD_IOMMU_DEBUG(" Length 0x%x\n", ivrs_block->length); + AMD_IOMMU_DEBUG(" Dev_Id 0x%x\n", ivrs_block->dev_id); if ( table->length < (length + ivrs_block->length) ) { - amd_iov_error("IVRS Error: " + AMD_IOMMU_DEBUG("IVRS Error: " "Table Length Exceeded: 0x%x -> 0x%lx\n", table->length, (length + ivrs_block->length)); @@ -859,7 +858,7 @@ static int __init detect_iommu_acpi(stru checksum += raw_table[i]; if ( checksum ) { - amd_iov_error("IVRS Error: " + AMD_IOMMU_DEBUG("IVRS Error: " "Invalid Checksum 0x%x\n", checksum); return -ENODEV; } @@ -893,7 +892,7 @@ static int __init get_last_bdf_ivhd(void if ( ivhd_block->header.length < sizeof(struct acpi_ivhd_block_header) ) { - amd_iov_error("IVHD Error: Invalid Block Length!\n"); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Block Length!\n"); return -ENODEV; } @@ -941,7 +940,7 @@ static int __init get_last_bdf_ivhd(void dev_length = sizeof(struct acpi_ivhd_device_special); break; default: - amd_iov_error("IVHD Error: Invalid Device Type!\n"); + AMD_IOMMU_DEBUG("IVHD Error: Invalid Device Type!\n"); dev_length = 0; break; } diff -r 72d130772f36 xen/drivers/passthrough/amd/iommu_detect.c --- a/xen/drivers/passthrough/amd/iommu_detect.c Wed Sep 16 09:30:41 2009 +0100 +++ b/xen/drivers/passthrough/amd/iommu_detect.c Wed Sep 16 19:22:00 2009 +0200 @@ -62,7 +62,7 @@ static int __init get_iommu_msi_capabili if ( !iommu->msi_cap ) return -ENODEV; - amd_iov_info("Found MSI capability block \n"); + AMD_IOMMU_DEBUG("Found MSI capability block \n"); control = pci_conf_read16(bus, dev, func, iommu->msi_cap + PCI_MSI_FLAGS); iommu->maskbit = control & PCI_MSI_FLAGS_MASKBIT; @@ -103,21 +103,21 @@ int __init amd_iommu_detect_one_acpi(voi if ( ivhd_block->header.length < sizeof(struct acpi_ivhd_block_header) ) { - amd_iov_error("Invalid IVHD Block Length!\n"); + AMD_IOMMU_DEBUG("Invalid IVHD Block Length!\n"); return -ENODEV; } if ( !ivhd_block->header.dev_id || !ivhd_block->cap_offset || !ivhd_block->mmio_base) { - amd_iov_error("Invalid IVHD Block!\n"); + AMD_IOMMU_DEBUG("Invalid IVHD Block!\n"); return -ENODEV; } iommu = (struct amd_iommu *) xmalloc(struct amd_iommu); if ( !iommu ) { - amd_iov_error("Error allocating amd_iommu\n"); + AMD_IOMMU_DEBUG("Error allocating amd_iommu\n"); return -ENOMEM; } memset(iommu, 0, sizeof(struct amd_iommu)); diff -r 72d130772f36 xen/drivers/passthrough/amd/iommu_init.c --- a/xen/drivers/passthrough/amd/iommu_init.c Wed Sep 16 09:30:41 2009 +0100 +++ b/xen/drivers/passthrough/amd/iommu_init.c Wed Sep 16 19:22:00 2009 +0200 @@ -44,7 +44,7 @@ static int __init map_iommu_mmio_region( if ( nr_amd_iommus > MAX_AMD_IOMMUS ) { - amd_iov_error("nr_amd_iommus %d > MAX_IOMMUS\n", nr_amd_iommus); + AMD_IOMMU_DEBUG("nr_amd_iommus %d > MAX_IOMMUS\n", nr_amd_iommus); return -ENOMEM; } @@ -437,7 +437,7 @@ static void parse_event_log_entry(u32 en if ( (code > IOMMU_EVENT_INVALID_DEV_REQUEST) || (code < IOMMU_EVENT_ILLEGAL_DEV_TABLE_ENTRY) ) { - amd_iov_error("Invalid event log entry!\n"); + AMD_IOMMU_DEBUG("Invalid event log entry!\n"); return; } @@ -500,7 +500,7 @@ static int set_iommu_interrupt_handler(s irq_desc[irq].handler = &no_irq_type; irq_to_iommu[irq] = NULL; destroy_irq(irq); - amd_iov_error("can't request irq\n"); + AMD_IOMMU_DEBUG("can't request irq\n"); return 0; } @@ -560,7 +560,7 @@ static int __init allocate_iommu_table_s if ( table->buffer == NULL ) { - amd_iov_error("Error allocating %s\n", name); + AMD_IOMMU_DEBUG("Error allocating %s\n", name); return -ENOMEM; } memset(table->buffer, 0, PAGE_SIZE * (1UL << order)); @@ -684,7 +684,7 @@ static int __init init_ivrs_mapping(void ivrs_mappings = xmalloc_array( struct ivrs_mappings, ivrs_bdf_entries); if ( ivrs_mappings == NULL ) { - amd_iov_error("Error allocating IVRS Mappings table\n"); + AMD_IOMMU_DEBUG("Error allocating IVRS Mappings table\n"); return -ENOMEM; } memset(ivrs_mappings, 0, ivrs_bdf_entries * sizeof(struct ivrs_mappings)); @@ -757,7 +757,7 @@ static int __init amd_iommu_setup_device amd_iommu_set_intremap_table( dte, (u64)virt_to_maddr(intr_tb), iommu_intremap); - amd_iov_info("Add device table entry at DTE:0x%x, " + AMD_IOMMU_DEBUG("Add device table entry at DTE:0x%x, " "intremap_table:%"PRIx64"\n", bdf, (u64)virt_to_maddr(intr_tb)); } diff -r 72d130772f36 xen/drivers/passthrough/amd/iommu_intr.c --- a/xen/drivers/passthrough/amd/iommu_intr.c Wed Sep 16 09:30:41 2009 +0100 +++ b/xen/drivers/passthrough/amd/iommu_intr.c Wed Sep 16 19:22:00 2009 +0200 @@ -153,7 +153,7 @@ int __init amd_iommu_setup_ioapic_remapp iommu = find_iommu_for_device(bdf); if ( !iommu ) { - amd_iov_warning( + AMD_IOMMU_DEBUG( "Fail to find iommu for ioapic device id = 0x%x\n", bdf); continue; } @@ -197,7 +197,7 @@ void amd_iommu_ioapic_update_ire( iommu = find_iommu_for_device(bdf); if ( !iommu ) { - amd_iov_warning( + AMD_IOMMU_DEBUG( "Fail to find iommu for ioapic device id = 0x%x\n", bdf); return; } @@ -285,7 +285,7 @@ void amd_iommu_msi_msg_update_ire( if ( !iommu ) { - amd_iov_warning( + AMD_IOMMU_DEBUG( "Fail to find iommu for MSI device id = 0x%x\n", (pdev->bus << 8) | pdev->devfn); return; diff -r 72d130772f36 xen/drivers/passthrough/amd/iommu_map.c --- a/xen/drivers/passthrough/amd/iommu_map.c Wed Sep 16 09:30:41 2009 +0100 +++ b/xen/drivers/passthrough/amd/iommu_map.c Wed Sep 16 19:22:00 2009 +0200 @@ -154,7 +154,7 @@ void flush_command_buffer(struct amd_iom } else { - amd_iov_warning("Warning: ComWaitInt bit did not assert!\n"); + AMD_IOMMU_DEBUG("Warning: ComWaitInt bit did not assert!\n"); } } } @@ -485,7 +485,7 @@ int amd_iommu_map_page(struct domain *d, if ( iommu_l2e == 0 ) { spin_unlock(&hd->mapping_lock); - amd_iov_error("Invalid IO pagetable entry gfn = %lx\n", gfn); + AMD_IOMMU_DEBUG("Invalid IO pagetable entry gfn = %lx\n", gfn); domain_crash(d); return -EFAULT; } @@ -511,7 +511,7 @@ int amd_iommu_unmap_page(struct domain * if ( iommu_l2e == 0 ) { spin_unlock(&hd->mapping_lock); - amd_iov_error("Invalid IO pagetable entry gfn = %lx\n", gfn); + AMD_IOMMU_DEBUG("Invalid IO pagetable entry gfn = %lx\n", gfn); domain_crash(d); return -EFAULT; } @@ -552,7 +552,7 @@ int amd_iommu_reserve_domain_unity_map( if ( iommu_l2e == 0 ) { spin_unlock(&hd->mapping_lock); - amd_iov_error("Invalid IO pagetable entry phys_addr = %lx\n", + AMD_IOMMU_DEBUG("Invalid IO pagetable entry phys_addr = %lx\n", phys_addr); domain_crash(domain); return -EFAULT; diff -r 72d130772f36 xen/drivers/passthrough/amd/pci_amd_iommu.c --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c Wed Sep 16 09:30:41 2009 +0100 +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c Wed Sep 16 19:22:00 2009 +0200 @@ -108,7 +108,7 @@ static void amd_iommu_setup_domain_devic invalidate_dev_table_entry(iommu, req_id); flush_command_buffer(iommu); - amd_iov_info("Setup I/O page table at DTE:0x%x, root_table:%"PRIx64"," + AMD_IOMMU_DEBUG("Setup I/O page table at DTE:0x%x, root_table:%"PRIx64"," "domain_id:%d, paging_mode:%d\n", req_id, page_to_maddr(hd->root_table), hd->domain_id, hd->paging_mode); } @@ -146,7 +146,7 @@ static void amd_iommu_setup_dom0_devices if ( !iommu ) { - amd_iov_warning("Fail to find iommu for device" + AMD_IOMMU_DEBUG("Fail to find iommu for device" "%02x:%02x.%x\n", bus, dev, func); continue; } @@ -163,7 +163,7 @@ int amd_iov_detect(void) if ( amd_iommu_detect_acpi() != 0 ) { - amd_iov_error("Error detection\n"); + AMD_IOMMU_DEBUG("Error detection\n"); return -ENODEV; } @@ -175,7 +175,7 @@ int amd_iov_detect(void) if ( amd_iommu_init() != 0 ) { - amd_iov_error("Error initialization\n"); + AMD_IOMMU_DEBUG("Error initialization\n"); return -ENODEV; } return 0; @@ -268,7 +268,7 @@ static void amd_iommu_disable_domain_dev disable_translation((u32 *)dte); invalidate_dev_table_entry(iommu, req_id); flush_command_buffer(iommu); - amd_iov_info("Disable DTE:0x%x," + AMD_IOMMU_DEBUG("Disable DTE:0x%x," " domain_id:%d, paging_mode:%d\n", req_id, domain_hvm_iommu(domain)->domain_id, domain_hvm_iommu(domain)->paging_mode); @@ -292,7 +292,7 @@ static int reassign_device( struct domai iommu = find_iommu_for_device(bdf); if ( !iommu ) { - amd_iov_error("Fail to find iommu." + AMD_IOMMU_DEBUG("Fail to find iommu." " %x:%x.%x cannot be assigned to domain %d\n", bus, PCI_SLOT(devfn), PCI_FUNC(devfn), target->domain_id); return -ENODEV; @@ -304,7 +304,7 @@ static int reassign_device( struct domai pdev->domain = target; amd_iommu_setup_domain_device(target, iommu, bdf); - amd_iov_info("reassign %x:%x.%x domain %d -> domain %d\n", + AMD_IOMMU_DEBUG("reassign %x:%x.%x domain %d -> domain %d\n", bus, PCI_SLOT(devfn), PCI_FUNC(devfn), source->domain_id, target->domain_id); @@ -392,7 +392,7 @@ static int amd_iommu_add_device(struct p iommu = find_iommu_for_device(bdf); if ( !iommu ) { - amd_iov_error("Fail to find iommu." + AMD_IOMMU_DEBUG("Fail to find iommu." " %x:%x.%x cannot be assigned to domain %d\n", pdev->bus, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), pdev->domain->domain_id); @@ -414,7 +414,7 @@ static int amd_iommu_remove_device(struc iommu = find_iommu_for_device(bdf); if ( !iommu ) { - amd_iov_error("Fail to find iommu." + AMD_IOMMU_DEBUG("Fail to find iommu." " %x:%x.%x cannot be removed from domain %d\n", pdev->bus, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), pdev->domain->domain_id); diff -r 72d130772f36 xen/drivers/passthrough/iommu.c --- a/xen/drivers/passthrough/iommu.c Wed Sep 16 09:30:41 2009 +0100 +++ b/xen/drivers/passthrough/iommu.c Wed Sep 16 19:22:00 2009 +0200 @@ -46,6 +46,7 @@ int iommu_snoop = 0; int iommu_snoop = 0; int iommu_qinval = 0; int iommu_intremap = 0; +int amd_iommu_debug = 0; static void __init parse_iommu_param(char *s) { @@ -54,6 +55,7 @@ static void __init parse_iommu_param(cha iommu_snoop = 1; iommu_qinval = 1; iommu_intremap = 1; + amd_iommu_debug = 0; do { ss = strchr(s, ','); @@ -77,6 +79,8 @@ static void __init parse_iommu_param(cha iommu_qinval = 0; else if ( !strcmp(s, "no-intremap") ) iommu_intremap = 0; + else if ( !strcmp(s, "amd-iommu-debug") ) + amd_iommu_debug = 1; s = ss + 1; } while ( ss ); diff -r 72d130772f36 xen/include/asm-x86/hvm/svm/amd-iommu-proto.h --- a/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h Wed Sep 16 09:30:41 2009 +0100 +++ b/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h Wed Sep 16 19:22:00 2009 +0200 @@ -32,18 +32,14 @@ #define DMA_32BIT_MASK 0x00000000ffffffffULL #define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK) -#ifdef AMD_IOV_DEBUG -#define amd_iov_info(fmt, args...) \ - printk(XENLOG_INFO "AMD_IOV: " fmt, ## args) -#define amd_iov_warning(fmt, args...) \ - printk(XENLOG_WARNING "AMD_IOV: " fmt, ## args) -#define amd_iov_error(fmt, args...) \ - printk(XENLOG_ERR "AMD_IOV: %s:%d: " fmt, __FILE__ , __LINE__ , ## args) -#else -#define amd_iov_info(fmt, args...) -#define amd_iov_warning(fmt, args...) -#define amd_iov_error(fmt, args...) -#endif +extern int amd_iommu_debug; + +#define AMD_IOMMU_DEBUG(fmt, args...) \ + do \ + { \ + if ( amd_iommu_debug ) \ + printk(XENLOG_INFO "AMD-Vi: " fmt, ## args); \ + } while(0) /* amd-iommu-detect functions */ int __init amd_iommu_get_ivrs_dev_entries(void); --Boundary-00=_DgksK6Ips+2QUx1 Content-Type: text/x-diff; charset="iso-8859-1"; name="optmz_intr.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="optmz_intr.patch" diff -r 97102ddc3cac xen/drivers/passthrough/amd/iommu_intr.c --- a/xen/drivers/passthrough/amd/iommu_intr.c Tue Sep 15 16:32:30 2009 +0200 +++ b/xen/drivers/passthrough/amd/iommu_intr.c Tue Sep 15 16:50:49 2009 +0200 @@ -192,6 +192,9 @@ void amd_iommu_ioapic_update_ire( *IO_APIC_BASE(apic) = reg; *(IO_APIC_BASE(apic)+4) = value; + if ( !iommu_intremap ) + return; + /* get device id of ioapic devices */ bdf = ioapic_bdf[IO_APIC_ID(apic)]; iommu = find_iommu_for_device(bdf); @@ -281,6 +284,9 @@ void amd_iommu_msi_msg_update_ire( struct pci_dev *pdev = msi_desc->dev; struct amd_iommu *iommu = NULL; + if ( !iommu_intremap ) + return; + iommu = find_iommu_for_device((pdev->bus << 8) | pdev->devfn); if ( !iommu ) --Boundary-00=_DgksK6Ips+2QUx1 Content-Type: text/x-diff; charset="iso-8859-1"; name="remove_def.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="remove_def.patch" diff -r 94e2a7924d19 xen/include/asm-x86/amd-iommu.h --- a/xen/include/asm-x86/amd-iommu.h Tue Sep 15 16:04:52 2009 +0200 +++ b/xen/include/asm-x86/amd-iommu.h Tue Sep 15 16:28:43 2009 +0200 @@ -58,9 +58,6 @@ struct amd_iommu { u8 pass_pw; u8 ht_tunnel_enable; - int last_downstream_bus; - int downstream_bus_present[PCI_MAX_BUS_COUNT]; - void *mmio_base; unsigned long mmio_base_phys; diff -r 94e2a7924d19 xen/include/asm-x86/hvm/svm/amd-iommu-defs.h --- a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h Tue Sep 15 16:04:52 2009 +0200 +++ b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h Tue Sep 15 16:28:43 2009 +0200 @@ -21,14 +21,6 @@ #ifndef _ASM_X86_64_AMD_IOMMU_DEFS_H #define _ASM_X86_64_AMD_IOMMU_DEFS_H -/* Reserve some non-mapped pages to handle error conditions. - * 'bad_dma_address' will point to these reserved pages, and - * the mapping funtions will return 'bad_dma_address' if there - * are not enough page table entries available. - */ -#define IOMMU_RESERVED_BASE_ADDR 0 -#define IOMMU_RESERVED_PAGES 32 - /* IOMMU ComWaitInt polling after issuing a COMPLETION_WAIT command */ #define COMPLETION_WAIT_DEFAULT_POLLING_COUNT 10 @@ -37,8 +29,6 @@ /* IOMMU Event Log entries: in power of 2 increments, minimum of 256 */ #define IOMMU_EVENT_LOG_DEFAULT_ENTRIES 512 - -#define BITMAP_ENTRIES_PER_BYTE 8 #define PTE_PER_TABLE_SHIFT 9 #define PTE_PER_TABLE_SIZE (1 << PTE_PER_TABLE_SHIFT) @@ -48,41 +38,6 @@ #define PTE_PER_TABLE_ALLOC(entries) \ PAGE_SIZE * (PTE_PER_TABLE_ALIGN(entries) >> PTE_PER_TABLE_SHIFT) -/* 0-based aperture order (represents virtual address space for DMA mappings */ -#define APERTURE_ORDER_FOR_32B_APERTURE 0 -#define APERTURE_ORDER_FOR_64MB_APERTURE 1 -#define APERTURE_ORDER_FOR_128MB_APERTURE 2 -#define APERTURE_ORDER_FOR_256MB_APERTURE 3 -#define APERTURE_ORDER_FOR_512MB_APERTURE 4 -#define APERTURE_ORDER_FOR_1GB_APERTURE 5 -#define APERTURE_ORDER_FOR_MAX_APERTURE APERTURE_ORDER_FOR_1GB_APERTURE - -/* The minimum 32MB aperture requires 2**13 level-1 page table entries */ -#define SHIFT_FOR_MIN_APERTURE 13 -#define PAGES_FROM_APERTURE_ORDER(order) \ - ((1 << (order)) << SHIFT_FOR_MIN_APERTURE) -#define ORDER_FROM_APERTURE_PAGES(pages) \ - get_order(((pages) * PAGE_SIZE) >> SHIFT_FOR_MIN_APERTURE) - -/* - * PCI config-space - */ -#define VALID_PCI_VENDOR_ID(id) (((id) != 0) && ((id) != 0xFFFF)) -#define IS_PCI_MULTI_FUNCTION(hdr) ((hdr) & 0x80) -#define IS_PCI_TYPE0_HEADER(hdr) (((hdr) & 0x7f) == 0) -#define IS_PCI_TYPE1_HEADER(hdr) (((hdr) & 0x7f) == 1) - -#define PCI_MAX_BUS_COUNT 256 -#define PCI_MAX_DEV_COUNT 32 -#define PCI_MAX_FUNC_COUNT 8 -#define PCI_MIN_DEVFN 0 -#define PCI_MAX_DEVFN 0xFF - -/* - * Capability blocks are 4-byte aligned, and must start at >= offset 0x40, - * for a max of 48 possible cap_blocks (256 - 0x40 = 192; 192 / 4 = 48) - * The lower 2 bits of each pointer are reserved, and must be masked off. - */ #define PCI_MIN_CAP_OFFSET 0x40 #define PCI_MAX_CAP_BLOCKS 48 #define PCI_CAP_PTR_MASK 0xFC @@ -105,7 +60,6 @@ #define PCI_CAP_RESET_MASK 0x80000000 #define PCI_CAP_RESET_SHIFT 31 -#define PCI_CAP_ID_SECURE_DEVICE 0x0F #define PCI_CAP_TYPE_IOMMU 0x3 #define PCI_CAP_MMIO_BAR_LOW_OFFSET 0x04 --Boundary-00=_DgksK6Ips+2QUx1 Content-Type: text/x-diff; charset="iso-8859-1"; name="comp_wait.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="comp_wait.patch" diff -r c38baf9c258a xen/drivers/passthrough/amd/iommu_map.c --- a/xen/drivers/passthrough/amd/iommu_map.c Tue Sep 15 18:16:01 2009 +0200 +++ b/xen/drivers/passthrough/amd/iommu_map.c Tue Sep 15 18:17:04 2009 +0200 @@ -23,8 +23,6 @@ #include #include -long amd_iommu_poll_comp_wait = COMPLETION_WAIT_DEFAULT_POLLING_COUNT; - static int queue_iommu_command(struct amd_iommu *iommu, u32 cmd[]) { u32 tail, head, *cmd_buffer; @@ -131,32 +129,24 @@ void flush_command_buffer(struct amd_iom IOMMU_COMP_WAIT_I_FLAG_SHIFT, &cmd[0]); send_iommu_command(iommu, cmd); - /* wait for 'ComWaitInt' to signal comp#endifletion? */ - if ( amd_iommu_poll_comp_wait ) - { - loop_count = amd_iommu_poll_comp_wait; - do { - status = readl(iommu->mmio_base + - IOMMU_STATUS_MMIO_OFFSET); - comp_wait = get_field_from_reg_u32( - status, - IOMMU_STATUS_COMP_WAIT_INT_MASK, - IOMMU_STATUS_COMP_WAIT_INT_SHIFT); - --loop_count; - } while ( loop_count && !comp_wait ); - - if ( comp_wait ) - { - /* clear 'ComWaitInt' in status register (WIC) */ - status &= IOMMU_STATUS_COMP_WAIT_INT_MASK; - writel(status, iommu->mmio_base + - IOMMU_STATUS_MMIO_OFFSET); - } - else - { - AMD_IOMMU_DEBUG("Warning: ComWaitInt bit did not assert!\n"); - } - } + /* Make loop_count long enough for polling completion wait bit */ + loop_count = 1000; + do { + status = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET); + comp_wait = get_field_from_reg_u32(status, + IOMMU_STATUS_COMP_WAIT_INT_MASK, + IOMMU_STATUS_COMP_WAIT_INT_SHIFT); + --loop_count; + } while ( !comp_wait && loop_count ); + + if ( comp_wait ) + { + /* clear 'ComWaitInt' in status register (WIC) */ + status &= IOMMU_STATUS_COMP_WAIT_INT_MASK; + writel(status, iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET); + return; + } + AMD_IOMMU_DEBUG("Warning: ComWaitInt bit did not assert!\n"); } static void clear_iommu_l1e_present(u64 l2e, unsigned long gfn) diff -r c38baf9c258a xen/include/asm-x86/hvm/svm/amd-iommu-defs.h --- a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h Tue Sep 15 18:16:01 2009 +0200 +++ b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h Tue Sep 15 18:17:04 2009 +0200 @@ -20,9 +20,6 @@ #ifndef _ASM_X86_64_AMD_IOMMU_DEFS_H #define _ASM_X86_64_AMD_IOMMU_DEFS_H - -/* IOMMU ComWaitInt polling after issuing a COMPLETION_WAIT command */ -#define COMPLETION_WAIT_DEFAULT_POLLING_COUNT 10 /* IOMMU Command Buffer entries: in power of 2 increments, minimum of 256 */ #define IOMMU_CMD_BUFFER_DEFAULT_ENTRIES 512 --Boundary-00=_DgksK6Ips+2QUx1 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel --Boundary-00=_DgksK6Ips+2QUx1--