From: Ingo Molnar <mingo@elte.hu>
To: "Russ Anderson" <rja@sgi.com>,
"Peter Zijlstra" <a.p.zijlstra@chello.nl>,
"Paul Mackerras" <paulus@samba.org>,
"Frédéric Weisbecker" <fweisbec@gmail.com>,
"Steven Rostedt" <rostedt@goodmis.org>
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, Cliff Wickman <cpw@sgi.com>
Subject: Re: [PATCH 2/2] x86: UV hardware performance counter and topology access
Date: Thu, 1 Oct 2009 09:46:30 +0200 [thread overview]
Message-ID: <20091001074630.GA6738@elte.hu> (raw)
In-Reply-To: <20090930210531.GC12090@sgi.com>
* Russ Anderson <rja@sgi.com> wrote:
> Adds device named "/dev/uv_hwperf" that supports an ioctl interface
> to call down into BIOS to read/write memory mapped performance
> monitoring registers.
That's not acceptable - please integrate this with perf events properly.
See arch/x86/kernel/cpu/perf_event.c for details.
Precisely what kinds of events are being exposed by the UV BIOS
interface? Also, how does the BIOS get them? The BIOS should be left out
of that - the PMU driver should know about and access hardware registers
directly.
If any of this needs enhancements in kernel/perf_event.c we'll be glad
to help out.
Ingo
next prev parent reply other threads:[~2009-10-01 7:46 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-09-30 21:05 [PATCH 2/2] x86: UV hardware performance counter and topology access Russ Anderson
2009-10-01 7:46 ` Ingo Molnar [this message]
2009-10-19 18:58 ` Russ Anderson
2009-10-20 6:31 ` Ingo Molnar
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