From: Felipe Balbi <felipe.balbi@nokia.com>
To: ext Anand Gadiyar <gadiyar@ti.com>
Cc: "linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>
Subject: Re: [PATCH] omap3: ehci: remove DPLL5 programming
Date: Thu, 1 Oct 2009 15:13:01 +0300 [thread overview]
Message-ID: <20091001121301.GJ15131@nokia.com> (raw)
In-Reply-To: <1254332221-29490-1-git-send-email-gadiyar@ti.com>
On Wed, Sep 30, 2009 at 07:37:01PM +0200, ext Anand Gadiyar wrote:
> omap3: ehci: remove DPLL5 programming
>
> DPLL5 programming should be taken care of by the clock framework.
> The driver should not need to worry about programming this
> explicitly.
>
> Also, the DPLL5 m and n values used were valid only for a
> specific value of the system clock. So they would not work
> correctly for other input frequencies anyway.
>
> Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Felipe Balbi <felipe.balbi@nokia.com>
We really needed to remove that, thanks a lot Anand.
> ---
> Needs http://patchwork.kernel.org/patch/46216/ to
> ensure the DPLL is locked correctly.
>
> diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
> index f2771cf..7efc2f5 100644
> --- a/drivers/usb/host/ehci-omap.c
> +++ b/drivers/usb/host/ehci-omap.c
> @@ -225,8 +225,6 @@ static void omap_usb_utmi_init(struct ehci_hcd_omap *omap, u8 tll_channel_mask)
>
> /*-------------------------------------------------------------------------*/
>
> -#include "../../../arch/arm/mach-omap2/cm-regbits-34xx.h"
> -
> /* omap_start_ehc
> * - Start the TI USBHOST controller
> */
> @@ -239,29 +237,6 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
>
> dev_dbg(omap->dev, "starting TI EHCI USB Controller\n");
>
> - /* Start DPLL5 Programming:
> - * Clock Framework is not doing this now:
> - * This will be done in clock framework later
> - */
> - /* Enable DPLL 5 : Based on Input of 13Mhz*/
> - cm_write_mod_reg((12 << OMAP3430ES2_PERIPH2_DPLL_DIV_SHIFT)|
> - (120 << OMAP3430ES2_PERIPH2_DPLL_MULT_SHIFT),
> - PLL_MOD, OMAP3430ES2_CM_CLKSEL4);
> -
> - cm_write_mod_reg(1 << OMAP3430ES2_DIV_120M_SHIFT,
> - PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
> -
> - cm_write_mod_reg((7 << OMAP3430ES2_PERIPH2_DPLL_FREQSEL_SHIFT) |
> - (7 << OMAP3430ES2_EN_PERIPH2_DPLL_SHIFT),
> - PLL_MOD, OMAP3430ES2_CM_CLKEN2);
> -
> - while (!(cm_read_mod_reg(PLL_MOD, CM_IDLEST2) &
> - OMAP3430ES2_ST_PERIPH2_CLK_MASK))
> - dev_dbg(omap->dev, "idlest2 = 0x%x\n",
> - cm_read_mod_reg(PLL_MOD, CM_IDLEST2));
> - /* End DPLL5 programming */
> -
> -
> /* Enable Clocks for USBHOST */
> omap->usbhost_ick = clk_get(omap->dev, "usbhost_ick");
> if (IS_ERR(omap->usbhost_ick)) {
> --
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--
balbi
prev parent reply other threads:[~2009-10-01 12:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-09-30 17:37 [PATCH] omap3: ehci: remove DPLL5 programming Anand Gadiyar
2009-09-30 18:39 ` [APPLIED] " Tony Lindgren
2009-10-01 12:13 ` Felipe Balbi [this message]
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