From: Nathan Froyd <froydnj@codesourcery.com>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 1/3] tcg: add ext{8,16,32}u_i{32,64} TCG ops
Date: Fri, 2 Oct 2009 13:07:12 -0700 [thread overview]
Message-ID: <20091002200712.GC9327@codesourcery.com> (raw)
In-Reply-To: <e388f3bbe334e3781ff318ce92d1474be6aaa99a.1254512633.git.aurelien@aurel32.net>
On Wed, Sep 30, 2009 at 11:09:35PM +0200, Aurelien Jarno wrote:
> Currently zero extensions ops are implemented by a and op with a
> constant. This is then catched in some backend, and replaced by
> a zero extension instruction. While this works well on RISC
> machines, this adds a useless register move on non-RISC machines.
>
> This patch adds ext{8,16,32}u_i{32,64} TCG ops that can be
> implemented in the backends to avoid emitting useless register
> moves.
I have to ask--does this make things go faster?
-Nathan
next prev parent reply other threads:[~2009-10-02 20:07 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-09-30 21:09 [Qemu-devel] [PATCH 1/3] tcg: add ext{8,16,32}u_i{32,64} TCG ops Aurelien Jarno
2009-09-30 21:44 ` [Qemu-devel] [PATCH 2/3] tcg/x86_64: add support for ext{8, 16, 32}u_i{32, 64} " Aurelien Jarno
2009-10-02 18:55 ` [Qemu-devel] [PATCH 3/3] tcg/i386: " Aurelien Jarno
2009-10-02 20:07 ` Nathan Froyd [this message]
2009-10-02 20:54 ` [Qemu-devel] [PATCH 1/3] tcg: add ext{8,16,32}u_i{32,64} " Aurelien Jarno
2009-11-10 14:51 ` Paul Brook
2009-11-10 15:38 ` Aurelien Jarno
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