From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] PPC4xx: Denali core: Fix incorrect DDR row bits
Date: Wed, 7 Oct 2009 09:36:26 +0200 [thread overview]
Message-ID: <200910070936.26409.sr@denx.de> (raw)
In-Reply-To: <2C7DE72B9BD00F44BAECA5B0CBB873955CADF7@hermes.terascala.com>
On Monday 05 October 2009 18:33:28 Mike Nuss wrote:
> The SPD detection code for the Denali memory controller used on some
> ppc4xx
> processors incorrectly encodes DDR0_42. With certain memory
> configurations,
> this can cause the bootwrapper to incorrectly calculate the installed
> memory
> size, because the number of row bits is wrong. This patch fixes that
> encoding.
Applied to u-boot-ppc4xx. Thanks.
Cheers,
Stefan
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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prev parent reply other threads:[~2009-10-07 7:36 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-10-05 16:33 [U-Boot] [PATCH] PPC4xx: Denali core: Fix incorrect DDR row bits Mike Nuss
2009-10-07 7:36 ` Stefan Roese [this message]
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