diff for duplicates of <20091019002416.GM12576@atomide.com> diff --git a/a/1.txt b/N1/1.txt index bbddf5d..80489a3 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,10 +3,10 @@ > > Thanks Tony for this ioremap series!! > > > > > -----Original Message----- -> > > From: Tony Lindgren [mailto:tony@atomide.com] +> > > From: Tony Lindgren [mailto:tony at atomide.com] > > > Sent: Saturday, October 17, 2009 5:16 AM -> > > To: linux-arm-kernel@lists.infradead.org -> > > Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh +> > > To: linux-arm-kernel at lists.infradead.org +> > > Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh > > > Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code > > > > > > * Tony Lindgren <tony@atomide.com> [091016 16:42]: diff --git a/a/2.hdr b/a/2.hdr deleted file mode 100644 index c9b5636..0000000 --- a/a/2.hdr +++ /dev/null @@ -1,2 +0,0 @@ -Content-Type: text/x-diff; charset=us-ascii -Content-Disposition: inline; filename="omap4-ioremap-v2.patch" diff --git a/a/2.txt b/a/2.txt deleted file mode 100644 index c64e166..0000000 --- a/a/2.txt +++ /dev/null @@ -1,193 +0,0 @@ ->From 608c394632ddeb91662a973275aff61c382c351d Mon Sep 17 00:00:00 2001 -From: Tony Lindgren <tony@atomide.com> -Date: Sun, 18 Oct 2009 17:19:30 -0700 -Subject: [PATCH] omap: Use ioremap for omap4 L4 code - -Use ioremap for omap4 L4 code - -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -Signed-off-by: Tony Lindgren <tony@atomide.com> - -diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c -index eb37c40..2545230 100644 ---- a/arch/arm/mach-omap2/board-4430sdp.c -+++ b/arch/arm/mach-omap2/board-4430sdp.c -@@ -52,8 +52,17 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = { - - static void __init gic_init_irq(void) - { -- gic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29); -- gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); -+ void __iomem *base; -+ -+ /* Static mapping, never released */ -+ base = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); -+ BUG_ON(!base); -+ gic_dist_init(0, base, 29); -+ -+ /* Static mapping, never released */ -+ gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); -+ BUG_ON(!base); -+ gic_cpu_init(0, gic_cpu_base_addr); - } - - static void __init omap_4430sdp_init_irq(void) -diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c -index 48ee295..8813ac2 100644 ---- a/arch/arm/mach-omap2/omap-smp.c -+++ b/arch/arm/mach-omap2/omap-smp.c -@@ -24,13 +24,14 @@ - #include <asm/localtimer.h> - #include <asm/smp_scu.h> - #include <mach/hardware.h> -+#include <mach/common.h> - - /* Registers used for communicating startup information */ --#define OMAP4_AUXCOREBOOT_REG0 (OMAP44XX_VA_WKUPGEN_BASE + 0x800) --#define OMAP4_AUXCOREBOOT_REG1 (OMAP44XX_VA_WKUPGEN_BASE + 0x804) -+static void __iomem *omap4_auxcoreboot_reg0; -+static void __iomem *omap4_auxcoreboot_reg1; - - /* SCU base address */ --static void __iomem *scu_base = OMAP44XX_VA_SCU_BASE; -+static void __iomem *scu_base; - - /* - * Use SCU config register to count number of cores -@@ -53,8 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ -- -- gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); -+ gic_cpu_init(0, gic_cpu_base_addr); - - /* - * Synchronise with the boot thread. -@@ -79,7 +79,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) - * the AuxCoreBoot1 register is updated with cpu state - * A barrier is added to ensure that write buffer is drained - */ -- __raw_writel(cpu, OMAP4_AUXCOREBOOT_REG1); -+ __raw_writel(cpu, omap4_auxcoreboot_reg1); - smp_wmb(); - - timeout = jiffies + (1 * HZ); -@@ -104,7 +104,7 @@ static void __init wakeup_secondary(void) - * A barrier is added to ensure that write buffer is drained - */ - __raw_writel(virt_to_phys(omap_secondary_startup), \ -- OMAP4_AUXCOREBOOT_REG0); -+ omap4_auxcoreboot_reg0); - smp_wmb(); - - /* -@@ -120,7 +120,13 @@ static void __init wakeup_secondary(void) - */ - void __init smp_init_cpus(void) - { -- unsigned int i, ncores = get_core_count(); -+ unsigned int i, ncores; -+ -+ /* Never released */ -+ scu_base = ioremap(OMAP44XX_SCU_BASE, SZ_256); -+ BUG_ON(!scu_base); -+ -+ ncores = get_core_count(); - - for (i = 0; i < ncores; i++) - set_cpu_possible(i, true); -@@ -130,6 +136,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) - { - unsigned int ncores = get_core_count(); - unsigned int cpu = smp_processor_id(); -+ void __iomem *omap4_wkupgen_base; - int i; - - /* sanity check */ -@@ -161,6 +168,12 @@ void __init smp_prepare_cpus(unsigned int max_cpus) - for (i = 0; i < max_cpus; i++) - set_cpu_present(i, true); - -+ /* Never released */ -+ omap4_wkupgen_base = ioremap(OMAP44XX_WKUPGEN_BASE, SZ_4K); -+ BUG_ON(!omap4_wkupgen_base); -+ omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x800; -+ omap4_auxcoreboot_reg1 = omap4_wkupgen_base + 0x804; -+ - if (max_cpus > 1) { - /* - * Enable the local timer or broadcast device for the -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c -index e2338c0..cd72970 100644 ---- a/arch/arm/mach-omap2/timer-gp.c -+++ b/arch/arm/mach-omap2/timer-gp.c -@@ -231,7 +231,8 @@ static void __init omap2_gp_clocksource_init(void) - static void __init omap2_gp_timer_init(void) - { - #ifdef CONFIG_LOCAL_TIMERS -- twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE); -+ twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); -+ BUG_ON(!twd_base); - #endif - omap_dm_timer_init(); - -diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c -index 3a4768d..fdcb1cf 100644 ---- a/arch/arm/plat-omap/common.c -+++ b/arch/arm/plat-omap/common.c -@@ -49,6 +49,9 @@ int omap_bootloader_tag_len; - struct omap_board_config_kernel *omap_board_config; - int omap_board_config_size; - -+/* used by omap-smp.c and board-4430sdp.c */ -+void __iomem *gic_cpu_base_addr; -+ - static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out) - { - struct omap_board_config_kernel *kinfo = NULL; -diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h -index fdeab42..064f173 100644 ---- a/arch/arm/plat-omap/include/mach/common.h -+++ b/arch/arm/plat-omap/include/mach/common.h -@@ -31,6 +31,9 @@ - - struct sys_timer; - -+/* used by omap-smp.c and board-4430sdp.c */ -+extern void __iomem *gic_cpu_base_addr; -+ - extern void omap_map_common_io(void); - extern struct sys_timer omap_timer; - #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) -diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S -index abe0864..3bad928 100644 ---- a/arch/arm/plat-omap/include/mach/entry-macro.S -+++ b/arch/arm/plat-omap/include/mach/entry-macro.S -@@ -104,6 +104,8 @@ - - .endm - #else -+#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) -+ - /* - * The interrupt numbering scheme is defined in the - * interrupt controller spec. To wit: -diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h -index b3ba5ac..8b4a578 100644 ---- a/arch/arm/plat-omap/include/mach/omap44xx.h -+++ b/arch/arm/plat-omap/include/mach/omap44xx.h -@@ -33,14 +33,9 @@ - #define IRQ_SIR_IRQ 0x0040 - #define OMAP44XX_GIC_DIST_BASE 0x48241000 - #define OMAP44XX_GIC_CPU_BASE 0x48240100 --#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) - #define OMAP44XX_SCU_BASE 0x48240000 --#define OMAP44XX_VA_SCU_BASE OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE) - #define OMAP44XX_LOCAL_TWD_BASE 0x48240600 --#define OMAP44XX_VA_LOCAL_TWD_BASE OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE) --#define OMAP44XX_LOCAL_TWD_SIZE 0x00000100 - #define OMAP44XX_WKUPGEN_BASE 0x48281000 --#define OMAP44XX_VA_WKUPGEN_BASE OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE) - - #endif /* __ASM_ARCH_OMAP44XX_H */ diff --git a/a/content_digest b/N1/content_digest index 195b7b3..35dea56 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,24 +3,21 @@ "ref\020091016234622.GH12576@atomide.com\0" "ref\0EAF47CD23C76F840A9E7FCE10091EFAB02BB37D7AA@dbde02.ent.ti.com\0" "ref\020091017161947.GK12576@atomide.com\0" - "From\0Tony Lindgren <tony@atomide.com>\0" - "Subject\0Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code\0" + "From\0tony@atomide.com (Tony Lindgren)\0" + "Subject\0[PATCH 08/14] omap: Use ioremap for omap4 L4 code\0" "Date\0Sun, 18 Oct 2009 17:24:16 -0700\0" - "To\0Shilimkar" - " Santosh <santosh.shilimkar@ti.com>\0" - "Cc\0linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>" - " linux-omap@vger.kernel.org <linux-omap@vger.kernel.org>\0" - "\01:1\0" + "To\0linux-arm-kernel@lists.infradead.org\0" + "\00:1\0" "b\0" "* Tony Lindgren <tony@atomide.com> [091017 09:19]:\n" "> * Shilimkar, Santosh <santosh.shilimkar@ti.com> [091017 03:49]:\n" "> > Thanks Tony for this ioremap series!!\n" "> > \n" "> > > -----Original Message-----\n" - "> > > From: Tony Lindgren [mailto:tony@atomide.com]\n" + "> > > From: Tony Lindgren [mailto:tony at atomide.com]\n" "> > > Sent: Saturday, October 17, 2009 5:16 AM\n" - "> > > To: linux-arm-kernel@lists.infradead.org\n" - "> > > Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh\n" + "> > > To: linux-arm-kernel at lists.infradead.org\n" + "> > > Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh\n" "> > > Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code\n" "> > > \n" "> > > * Tony Lindgren <tony@atomide.com> [091016 16:42]:\n" @@ -42,201 +39,5 @@ "Here's this one updated with Santosh's fix merged in.\n" "\n" Tony - "\01:2\0" - "fn\0omap4-ioremap-v2.patch\0" - "b\0" - ">From 608c394632ddeb91662a973275aff61c382c351d Mon Sep 17 00:00:00 2001\n" - "From: Tony Lindgren <tony@atomide.com>\n" - "Date: Sun, 18 Oct 2009 17:19:30 -0700\n" - "Subject: [PATCH] omap: Use ioremap for omap4 L4 code\n" - "\n" - "Use ioremap for omap4 L4 code\n" - "\n" - "Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>\n" - "Signed-off-by: Tony Lindgren <tony@atomide.com>\n" - "\n" - "diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c\n" - "index eb37c40..2545230 100644\n" - "--- a/arch/arm/mach-omap2/board-4430sdp.c\n" - "+++ b/arch/arm/mach-omap2/board-4430sdp.c\n" - "@@ -52,8 +52,17 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = {\n" - " \n" - " static void __init gic_init_irq(void)\n" - " {\n" - "-\tgic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);\n" - "-\tgic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));\n" - "+\tvoid __iomem *base;\n" - "+\n" - "+\t/* Static mapping, never released */\n" - "+\tbase = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);\n" - "+\tBUG_ON(!base);\n" - "+\tgic_dist_init(0, base, 29);\n" - "+\n" - "+\t/* Static mapping, never released */\n" - "+\tgic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);\n" - "+\tBUG_ON(!base);\n" - "+\tgic_cpu_init(0, gic_cpu_base_addr);\n" - " }\n" - " \n" - " static void __init omap_4430sdp_init_irq(void)\n" - "diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c\n" - "index 48ee295..8813ac2 100644\n" - "--- a/arch/arm/mach-omap2/omap-smp.c\n" - "+++ b/arch/arm/mach-omap2/omap-smp.c\n" - "@@ -24,13 +24,14 @@\n" - " #include <asm/localtimer.h>\n" - " #include <asm/smp_scu.h>\n" - " #include <mach/hardware.h>\n" - "+#include <mach/common.h>\n" - " \n" - " /* Registers used for communicating startup information */\n" - "-#define OMAP4_AUXCOREBOOT_REG0\t\t(OMAP44XX_VA_WKUPGEN_BASE + 0x800)\n" - "-#define OMAP4_AUXCOREBOOT_REG1\t\t(OMAP44XX_VA_WKUPGEN_BASE + 0x804)\n" - "+static void __iomem *omap4_auxcoreboot_reg0;\n" - "+static void __iomem *omap4_auxcoreboot_reg1;\n" - " \n" - " /* SCU base address */\n" - "-static void __iomem *scu_base = OMAP44XX_VA_SCU_BASE;\n" - "+static void __iomem *scu_base;\n" - " \n" - " /*\n" - " * Use SCU config register to count number of cores\n" - "@@ -53,8 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)\n" - " \t * core (e.g. timer irq), then they will not have been enabled\n" - " \t * for us: do so\n" - " \t */\n" - "-\n" - "-\tgic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));\n" - "+\tgic_cpu_init(0, gic_cpu_base_addr);\n" - " \n" - " \t/*\n" - " \t * Synchronise with the boot thread.\n" - "@@ -79,7 +79,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)\n" - " \t * the AuxCoreBoot1 register is updated with cpu state\n" - " \t * A barrier is added to ensure that write buffer is drained\n" - " \t */\n" - "-\t__raw_writel(cpu, OMAP4_AUXCOREBOOT_REG1);\n" - "+\t__raw_writel(cpu, omap4_auxcoreboot_reg1);\n" - " \tsmp_wmb();\n" - " \n" - " \ttimeout = jiffies + (1 * HZ);\n" - "@@ -104,7 +104,7 @@ static void __init wakeup_secondary(void)\n" - " \t * A barrier is added to ensure that write buffer is drained\n" - " \t */\n" - " \t__raw_writel(virt_to_phys(omap_secondary_startup),\t \\\n" - "-\t\t\t\t\tOMAP4_AUXCOREBOOT_REG0);\n" - "+\t\t\t\t\tomap4_auxcoreboot_reg0);\n" - " \tsmp_wmb();\n" - " \n" - " \t/*\n" - "@@ -120,7 +120,13 @@ static void __init wakeup_secondary(void)\n" - " */\n" - " void __init smp_init_cpus(void)\n" - " {\n" - "-\tunsigned int i, ncores = get_core_count();\n" - "+\tunsigned int i, ncores;\n" - "+\n" - "+\t/* Never released */\n" - "+\tscu_base = ioremap(OMAP44XX_SCU_BASE, SZ_256);\n" - "+\tBUG_ON(!scu_base);\n" - "+\n" - "+\tncores = get_core_count();\n" - " \n" - " \tfor (i = 0; i < ncores; i++)\n" - " \t\tset_cpu_possible(i, true);\n" - "@@ -130,6 +136,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)\n" - " {\n" - " \tunsigned int ncores = get_core_count();\n" - " \tunsigned int cpu = smp_processor_id();\n" - "+\tvoid __iomem *omap4_wkupgen_base;\n" - " \tint i;\n" - " \n" - " \t/* sanity check */\n" - "@@ -161,6 +168,12 @@ void __init smp_prepare_cpus(unsigned int max_cpus)\n" - " \tfor (i = 0; i < max_cpus; i++)\n" - " \t\tset_cpu_present(i, true);\n" - " \n" - "+\t/* Never released */\n" - "+\tomap4_wkupgen_base = ioremap(OMAP44XX_WKUPGEN_BASE, SZ_4K);\n" - "+\tBUG_ON(!omap4_wkupgen_base);\n" - "+\tomap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x800;\n" - "+\tomap4_auxcoreboot_reg1 = omap4_wkupgen_base + 0x804;\n" - "+\n" - " \tif (max_cpus > 1) {\n" - " \t\t/*\n" - " \t\t * Enable the local timer or broadcast device for the\n" - "diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c\n" - "index e2338c0..cd72970 100644\n" - "--- a/arch/arm/mach-omap2/timer-gp.c\n" - "+++ b/arch/arm/mach-omap2/timer-gp.c\n" - "@@ -231,7 +231,8 @@ static void __init omap2_gp_clocksource_init(void)\n" - " static void __init omap2_gp_timer_init(void)\n" - " {\n" - " #ifdef CONFIG_LOCAL_TIMERS\n" - "-\ttwd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE);\n" - "+\ttwd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);\n" - "+\tBUG_ON(!twd_base);\n" - " #endif\n" - " \tomap_dm_timer_init();\n" - " \n" - "diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c\n" - "index 3a4768d..fdcb1cf 100644\n" - "--- a/arch/arm/plat-omap/common.c\n" - "+++ b/arch/arm/plat-omap/common.c\n" - "@@ -49,6 +49,9 @@ int omap_bootloader_tag_len;\n" - " struct omap_board_config_kernel *omap_board_config;\n" - " int omap_board_config_size;\n" - " \n" - "+/* used by omap-smp.c and board-4430sdp.c */\n" - "+void __iomem *gic_cpu_base_addr;\n" - "+\n" - " static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)\n" - " {\n" - " \tstruct omap_board_config_kernel *kinfo = NULL;\n" - "diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h\n" - "index fdeab42..064f173 100644\n" - "--- a/arch/arm/plat-omap/include/mach/common.h\n" - "+++ b/arch/arm/plat-omap/include/mach/common.h\n" - "@@ -31,6 +31,9 @@\n" - " \n" - " struct sys_timer;\n" - " \n" - "+/* used by omap-smp.c and board-4430sdp.c */\n" - "+extern void __iomem *gic_cpu_base_addr;\n" - "+\n" - " extern void omap_map_common_io(void);\n" - " extern struct sys_timer omap_timer;\n" - " #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)\n" - "diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S\n" - "index abe0864..3bad928 100644\n" - "--- a/arch/arm/plat-omap/include/mach/entry-macro.S\n" - "+++ b/arch/arm/plat-omap/include/mach/entry-macro.S\n" - "@@ -104,6 +104,8 @@\n" - " \n" - " \t\t.endm\n" - " #else\n" - "+#define OMAP44XX_VA_GIC_CPU_BASE\tOMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)\n" - "+\n" - " \t\t/*\n" - " \t\t * The interrupt numbering scheme is defined in the\n" - " \t\t * interrupt controller spec. To wit:\n" - "diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h\n" - "index b3ba5ac..8b4a578 100644\n" - "--- a/arch/arm/plat-omap/include/mach/omap44xx.h\n" - "+++ b/arch/arm/plat-omap/include/mach/omap44xx.h\n" - "@@ -33,14 +33,9 @@\n" - " #define IRQ_SIR_IRQ\t\t\t0x0040\n" - " #define OMAP44XX_GIC_DIST_BASE\t\t0x48241000\n" - " #define OMAP44XX_GIC_CPU_BASE\t\t0x48240100\n" - "-#define OMAP44XX_VA_GIC_CPU_BASE\tOMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)\n" - " #define OMAP44XX_SCU_BASE\t\t0x48240000\n" - "-#define OMAP44XX_VA_SCU_BASE\t\tOMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE)\n" - " #define OMAP44XX_LOCAL_TWD_BASE\t\t0x48240600\n" - "-#define OMAP44XX_VA_LOCAL_TWD_BASE\tOMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)\n" - "-#define OMAP44XX_LOCAL_TWD_SIZE\t\t0x00000100\n" - " #define OMAP44XX_WKUPGEN_BASE\t\t0x48281000\n" - "-#define OMAP44XX_VA_WKUPGEN_BASE\tOMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)\n" - " \n" - #endif /* __ASM_ARCH_OMAP44XX_H */ -fce6789b4e77440782fad8e15fe65033709b1d7736b4dac12e5d13eca1515cf0 +2b09846bdf64e3558d3517dafab5970cba8b454d58937157298876ec8a83af76
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