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Date: Fri, 6 Nov 2009 09:10:33 +0100
From: Richard Cochran <richardcochran@domain.hid>
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Subject: Re: [Xenomai-core] [Xenomai core] Freeze on MPC8572 and P2020 with
	SMP
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To: Philippe Gerum <rpm@xenomai.org>
Cc: xenomai@xenomai.org

On Wed, Nov 04, 2009 at 11:16:21PM +0100, Philippe Gerum wrote:
> Core 0 waits for core 1 to acknowledge the critical IPI, but that
> lazybones prefers to sleep. Likely because it did not receive the IPI in
> question, actually (it should raise a bit in  __ipipe_cpu_sync_map, see
> __ipipe_do_critical_sync). You may want to find the reason why the IPI
> sent in ipipe_critical_enter() does not propagate to the other core.

In file arch/powerpc/kernel/smp.c line 160, it appears that the IPIPE
ifdef code is not reached when msg==3, which is the important value,
AFAIKT.

I have neither CONFIG_DEBUGGER nor CONFIG_KEXEC defined.


int smp_request_message_ipi(int virq, int msg)
{
	int err;

	if (msg < 0 || msg > PPC_MSG_DEBUGGER_BREAK) {
		return -EINVAL;
	}
#if !defined(CONFIG_DEBUGGER) && !defined(CONFIG_KEXEC)
	if (msg == PPC_MSG_DEBUGGER_BREAK) {
		return 1;
	}
#endif
#ifdef CONFIG_IPIPE
	if (msg == PPC_MSG_DEBUGGER_BREAK)
		/* Piggyback the debugger IPI for the I-pipe. */
		__ipipe_register_ipi(virq);
#endif

	err = request_irq(virq, smp_ipi_action[msg], IRQF_DISABLED|IRQF_PERCPU,
			  smp_ipi_name[msg], 0);
	WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
		virq, smp_ipi_name[msg], err);

	return err;
}