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From: Ira W. Snyder <iws@ovro.caltech.edu>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 3/7] 83xx/85xx/86xx: Add ECC support
Date: Tue, 10 Nov 2009 08:51:24 -0800	[thread overview]
Message-ID: <20091110165124.GA1549@ovro.caltech.edu> (raw)
In-Reply-To: <1257822445.7312.12.camel@ptyser-laptop>

On Mon, Nov 09, 2009 at 09:07:25PM -0600, Peter Tyser wrote:

[ big snip ]

> > 
> > I haven't looked at your code. When I was running the old ecc command, I
> > had the 83xx reference manual open to decode the command's output, IIRC.
> > 
> > PS - I'm happy to test stuff on 83xx, I'll try and find time to test
> > this patch series tomorrow.
> 
> Thanks, its much appreciated.
> 

Ok, here are my results, this is on a 8349EMDS-derived board. My
8349EMDS eval board doesn't have ECC memory.

1) It might be nice to have something to print the current injection
registers. It is not a big deal, anyone using this should be an expert
anyway.

2) ecc inject off didn't seem to work, see the following capture:

=> ecc info
No ECC errors have occurred
=> ecc inject low 0x1
=> ecc info

WARNING: ECC error in DDR Controller 0
        Addr:   0x0_0ff7ae40
        Data:   0x0fffdf9c_0ff7aed1     ECC:    0x81
        Expect: 0x0fffdf9c_0ff7aed0     ECC:    0x81
        Net:    DATA0
        Syndrome: 0x3b
        Single-Bit errors: 0x1e
        Attrib: 0x01002001
        Detect: 0x80000004 (MME, SBE) 

=> ecc inject off

# Ok, now error injection is off, I still expect some errors to be
# present in the error registers

=> ecc info

WARNING: ECC error in DDR Controller 0
        Addr:   0x0_0ff7ae1c
        Data:   0x0fffdf9c_0ff7d2a1     ECC:    0xe4
        Expect: 0x0fffdf9c_0ff7d2a0     ECC:    0xe4
        Net:    DATA0
        Syndrome: 0x3b
        Single-Bit errors: 0xd1
        Attrib: 0x01003001
        Detect: 0x80000004 (MME, SBE) 

# And there was the error. Now, I don't expect any more errors to
# be present, after all, injection is disabled.
#
# But there is one! Why?

=> ecc info

WARNING: ECC error in DDR Controller 0
        Addr:   0x0_0fff8a0c
        Data:   0x0fff8a00_0fff8a01     ECC:    0xff
        Expect: 0x0fff8a00_0fff8a00     ECC:    0xff
        Net:    DATA0
        Syndrome: 0x3b
        Single-Bit errors: 0x04
        Attrib: 0x01003001
        Detect: 0x00000000
=> 

# Note that I keep seeing ecc errors until I run the command:
# ecc inject low 0




Here is another trace showing "interesting" behavior:

=> ecc info
No ECC errors have occurred
=> ecc inject high 1
=> ecc info

WARNING: ECC error in DDR Controller 0
        Addr:   0x0_0ff7ae40
        Data:   0x0fffdf9d_0ff7aed0     ECC:    0x81
        Expect: 0x0fffdf9c_0ff7aed0     ECC:    0x81
        Net:    DATA32
        Syndrome: 0xce
        Single-Bit errors: 0xd8
        Attrib: 0x01002001
        Detect: 0x80000004 (MME, SBE) 

=> ecc info

WARNING: ECC error in DDR Controller 0
        Addr:   0x0_0fff89c4
        Data:   0x0fff89b9_0ff7d268     ECC:    0x02
        Expect: 0x0fff89b8_0ff7d268     ECC:    0x02
        Net:    DATA32
        Syndrome: 0xce
        Single-Bit errors: 0xea
        Attrib: 0x01003001
        Detect: 0x80000004 (MME, SBE) 

=> ecc info

WARNING: ECC error in DDR Controller 0
        Addr:   0x0_0ff7d2e8
        Data:   0x00000001_0ff7d300     ECC:    0x99
        Expect: 0x00000000_0ff7d300     ECC:    0x99
        Net:    DATA32
        Syndrome: 0xce
        Single-Bit errors: 0x30
        Attrib: 0x01002001
        Detect: 0x80000004 (MME, SBE) 

=> ecc inject high 0
=> ecc info

WARNING: ECC error in DDR Controller 0
        Addr:   0x0_0ff7d2e8
        Data:   0x00000001_0ff7d300     ECC:    0x99
        Expect: 0x00000000_0ff7d300     ECC:    0x99
        Net:    DATA32
        Syndrome: 0xce
        Single-Bit errors: 0x81
        Attrib: 0x01002001
        Detect: 0x80000004 (MME, SBE) 

=> ecc info

WARNING: ECC error in DDR Controller 0
        Addr:   0x0_0fff8a0c
        Data:   0x0fff8a01_0fff8a00     ECC:    0xff
        Expect: 0x0fff8a00_0fff8a00     ECC:    0xff
        Net:    DATA32
        Syndrome: 0xce
        Single-Bit errors: 0x04
        Attrib: 0x01003001
        Detect: 0x00000000
=> ecc info
No ECC errors have occurred
=> ecc info
No ECC errors have occurred


# Why did it take two runs of ecc info to clear all of the errors?

Other than the above strangeness, everything is working great on my 83xx
board. I think the new output is pretty nice. It serves my purposes
equally well to the old code.

Ira

  reply	other threads:[~2009-11-10 16:51 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-11-09 23:37 [U-Boot] [PATCH v2 0/7] 83xx/85xx/86xx ECC update Peter Tyser
2009-11-09 23:37 ` [U-Boot] [PATCH 1/7] 83xx: Add CCSR DDR register offsets Peter Tyser
2009-11-09 23:37 ` [U-Boot] [PATCH 2/7] 85xx/86xx: Add ECC error injection defines Peter Tyser
2009-11-09 23:37 ` [U-Boot] [PATCH 3/7] 83xx/85xx/86xx: Add ECC support Peter Tyser
2009-11-10  0:25   ` Liu Dave-R63238
2009-11-10  0:32     ` Peter Tyser
2009-11-10  0:38       ` Liu Dave-R63238
2009-11-10  0:42         ` Liu Dave-R63238
2009-11-10  0:46           ` Liu Dave-R63238
2009-11-10  1:01           ` Peter Tyser
2009-11-10  1:08             ` Liu Dave-R63238
2009-11-10  1:20               ` Peter Tyser
2009-11-10  2:15                 ` Ira W. Snyder
2009-11-10  3:07                   ` Peter Tyser
2009-11-10 16:51                     ` Ira W. Snyder [this message]
2009-11-10 17:36                       ` Peter Tyser
2009-11-10 17:53                         ` Ira W. Snyder
2009-11-09 23:37 ` [U-Boot] [PATCH 4/7] 83xx: Migrate CONFIG_DDR_ECC_CMD to CONFIG_EDAC_FSL_ECC Peter Tyser
2009-11-10  0:51   ` [U-Boot] [PATCH 4/7] 83xx: Migrate CONFIG_DDR_ECC_CMD toCONFIG_EDAC_FSL_ECC Liu Dave-R63238
2009-11-10  1:09     ` Peter Tyser
2009-11-09 23:37 ` [U-Boot] [PATCH 5/7] Add check for ECC errors during SDRAM POST and mtest Peter Tyser
2009-11-09 23:37 ` [U-Boot] [PATCH 6/7] xes: Add 8xxx post support Peter Tyser
2009-11-09 23:37 ` [U-Boot] [PATCH 7/7] xes: Enable memory POST and ECC error reporting Peter Tyser
2009-12-16 15:55 ` [U-Boot] [PATCH v2 0/7] 83xx/85xx/86xx ECC update Peter Tyser

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