From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N81W5-0007O5-Ff for qemu-devel@nongnu.org; Tue, 10 Nov 2009 19:56:57 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N81W0-0007GH-GP for qemu-devel@nongnu.org; Tue, 10 Nov 2009 19:56:56 -0500 Received: from [199.232.76.173] (port=53984 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N81W0-0007Fq-9S for qemu-devel@nongnu.org; Tue, 10 Nov 2009 19:56:52 -0500 Received: from mx20.gnu.org ([199.232.41.8]:58694) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1N81Vz-0005Na-Ub for qemu-devel@nongnu.org; Tue, 10 Nov 2009 19:56:52 -0500 Received: from mail.codesourcery.com ([38.113.113.100]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N81Vy-0002yn-R0 for qemu-devel@nongnu.org; Tue, 10 Nov 2009 19:56:51 -0500 From: Paul Brook Subject: Re: [Qemu-devel] Re: [PATCH 01/12] TCG "sync" op Date: Wed, 11 Nov 2009 00:56:47 +0000 References: <1256133153-3121-1-git-send-email-uli@suse.de> <1256133153-3121-2-git-send-email-uli@suse.de> <20091022210317.GO1883@hall.aurel32.net> In-Reply-To: <20091022210317.GO1883@hall.aurel32.net> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Message-Id: <200911110056.48147.paul@codesourcery.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: riku.voipio@iki.fi, agraf@suse.de, Aurelien Jarno On Thursday 22 October 2009, Aurelien Jarno wrote: > On Wed, Oct 21, 2009 at 03:52:22PM +0200, Ulrich Hecht wrote: > > sync allows concurrent accesses to locations in memory through different > > TCG variables. This comes in handy when you are emulating CPU registers > > that can be used as either 32 or 64 bit, as TCG doesn't know anything > > about aliases. See the s390x target for an example. > > > > Fixed sync_i64 build failure on 32-bit targets. > > Looking more in details to the use case of this patch, I think it can be > useful in QEMU. However I don't feel very comfortable in merging it > without having the opinion of more persons. Paul, Malc Blue Swirl or > others, any opinion? I don't think this is the right solution. IIUC the basic problem is that we have a register file where adjacent pairs of 32-bit registers are also accessed as a 64-bit value. This is something many other targets need to do (at least ARM, PPC, MIPS and SPARC). While sync appears attractive as a quick hack to achieve this, I think it is liable to be abused, and cause us serious pain long-term. If you need an easy solution then use ld/st (as with ARM VFP registers). If you want a good solution then fix whichever bit of TCG makes accessing a pair of registers horribly slow. We already have some support for this (concat_i32_i64). Paul