From: jamie.iles@picochip.com (Jamie Iles)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] arm: provide a mechanism to reserve performance counters
Date: Fri, 11 Dec 2009 17:30:12 +0000 [thread overview]
Message-ID: <20091211173012.GK4164@wear.picochip.com> (raw)
In-Reply-To: <000301ca7a85$e38e18e0$aaaa4aa0$@deacon@arm.com>
On Fri, Dec 11, 2009 at 05:17:59PM -0000, Will Deacon wrote:
> That looks good to me. This allows SMP systems to set the affinity of the PMU
> IRQs too if need be - or should this also be done here? It might also be worth making
> the returned struct const to stop people poking, but I'm not sure.
>
> I've got some oprofile patches which I hope to post soon - I'll put a note in the
> covering letter to say they should be modified to use these PMU functions when they make
> it in.
I was just looking at that. I've changed all of the oprofile models but I'm
not sure what to do for mpcore as it also has the SCU and the setup. How about
I also add the following calls?
/* Reserve the SCU in the same manner as the PMU. */
struct pmu_irqs *reserve_scu(void):
/* Release the SCU in the same manner as the PMU. */
void release_scu(struct pmu_irqs *);
/* Initialise the PMU. For SMP systems this will be setting the IRQ affinity.
* For other systems this may be a nop. */
int init_pmu(void);
/* Initialise the SCU. For SMP systems this will be setting the IRQ affinity.
* For other systems this may be a nop. */
int init_scu(void);
Jamie
next prev parent reply other threads:[~2009-12-11 17:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-12-11 15:31 [PATCH 1/4] arm: provide a mechanism to reserve performance counters Will Deacon
2009-12-11 15:41 ` Jamie Iles
2009-12-11 17:17 ` Will Deacon
2009-12-11 17:30 ` Jamie Iles [this message]
2009-12-11 17:34 ` Will Deacon
2009-12-11 18:07 ` Jamie Iles
2009-12-11 21:09 ` Russell King - ARM Linux
-- strict thread matches above, loose matches on Subject: below --
2009-12-11 9:44 perf events for ARMv6 Jamie Iles
2009-12-11 9:44 ` [PATCH 1/4] arm: provide a mechanism to reserve performance counters Jamie Iles
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