From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [PATCH] Add definitions for current cpu models.. Date: Thu, 21 Jan 2010 00:20:31 +0100 Message-ID: <201001210020.32467.arnd@arndb.de> References: <4B549016.6090501@redhat.com> Mime-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Cc: KVM list , qemu-devel@nongnu.org, "Przywara, Andre" , donald.d.dugger@intel.com To: john cooper Return-path: Received: from moutng.kundenserver.de ([212.227.17.10]:61530 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752191Ab0ATXUw (ORCPT ); Wed, 20 Jan 2010 18:20:52 -0500 In-Reply-To: <4B549016.6090501@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On Monday 18 January 2010, john cooper wrote: > + .name = "Conroe", > + .level = 2, > + .vendor1 = CPUID_VENDOR_INTEL_1, > + .vendor2 = CPUID_VENDOR_INTEL_2, > + .vendor3 = CPUID_VENDOR_INTEL_3, > + .family = 6, /* P6 */ > + .model = 2, ^^^^^^^^ that looks wrong -- what is model 2 actually? > + .stepping = 3, > + .features = PPRO_FEATURES | > + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | /* note 1 */ > + CPUID_PSE36, /* note 2 */ > + .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_SSSE3, > + .ext2_features = (PPRO_FEATURES & CPUID_EXT2_MASK) | > + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, > + .ext3_features = CPUID_EXT3_LAHF_LM, > + .xlevel = 0x8000000A, > + .model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)", > + }, Celeron_4x0 is a rather bad example, because it is based on the single-core Conroe-L, which is family 6 / model 22 unlike all the dual- and quad-core Merom/Conroe that are model 15. > + { > + .name = "Penryn", > + .level = 2, > + .vendor1 = CPUID_VENDOR_INTEL_1, > + .vendor2 = CPUID_VENDOR_INTEL_2, > + .vendor3 = CPUID_VENDOR_INTEL_3, > + .family = 6, /* P6 */ > + .model = 2, > + .stepping = 3, > + .features = PPRO_FEATURES | > + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | /* note 1 */ > + CPUID_PSE36, /* note 2 */ > + .ext_features = CPUID_EXT_SSE3 | > + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE41, > + .ext2_features = (PPRO_FEATURES & CPUID_EXT2_MASK) | > + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, > + .ext3_features = CPUID_EXT3_LAHF_LM, > + .xlevel = 0x8000000A, > + .model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)", > + }, This would be model 23 for Penryn-class Xeon/Core/Pentium/Celeron processors without L3 cache. > + { > + .name = "Nehalem", > + .level = 2, > + .vendor1 = CPUID_VENDOR_INTEL_1, > + .vendor2 = CPUID_VENDOR_INTEL_2, > + .vendor3 = CPUID_VENDOR_INTEL_3, > + .family = 6, /* P6 */ > + .model = 2, > + .stepping = 3, > + .features = PPRO_FEATURES | > + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | /* note 1 */ > + CPUID_PSE36, /* note 2 */ > + .ext_features = CPUID_EXT_SSE3 | > + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE41 | > + CPUID_EXT_SSE42 | CPUID_EXT_POPCNT, > + .ext2_features = (PPRO_FEATURES & CPUID_EXT2_MASK) | > + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, > + .ext3_features = CPUID_EXT3_LAHF_LM, > + .xlevel = 0x8000000A, > + .model_id = "Intel Core i7 9xx (Nehalem Class Core i7)", > + }, Apparently, not all the i7-9xx CPUs are Nehalem, the i7-980X is supposed to be Westmere, which has more features. Because of the complexity, I'd recommend passing down the *model* number of the emulated CPU, the interesting Intel ones (those supported by KVM) being: 15-6: CedarMill/Presler/Dempsey/Tulsa (Pentium 4/Pentium D/Xeon 50xx/Xeon 71xx) 6-14: Yonah/Sossaman (Celeron M4xx, Core Solo/Duo, Pentium Dual-Core T1000, Xeon ULV) 6-15: Merom/Conroe/Kentsfield/Woodcrest/Clovertown/Tigerton (Celeron M5xx/E1xxx/T1xxx, Pentium T2xxx/T3xxx/E2xxx,Core 2 Solo U2xxx, Core 2 Duo E4xxx/E6xxx/Q6xxx/T5xxx/T7xxx/L7xxx/U7xxx/SP7xxx, Xeon 30xx/32xx/51xx/52xx/72xx/73xx) 6-22: Penryn/Wolfdale/Yorkfield/Harpertown (Celeron 7xx/9xx/SU2xxx/T3xxx/E3xxx, Pentium T4xxx/SU2xxx/SU4xxx/E5xxx/E6xxx, Core 2 Solo SU3xxx, Core 2 Duo Pxxxx/SUxxxx/T6xxx/x8xxx/x9xxx, Xeon 31xx/33xx/52xx/54xx) 6-26: Gainestown/Bloomfield (Xeon 35xx/55xx, Core i7-9xx) 6-28: Atom 6-29: Dunnington (Xeon 74xx) 6-30: Lynnfield/Clarksfield/JasperForest (Xeon 34xx, Core i7-8xx, Core i7-xxxQM, Core i5-7xx) 6-37: Arrandale/Clarkdale (Dual-Core Core i3/i5/i7) 6-44: Gulftown (six-core) Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NXjr3-0007hz-4F for qemu-devel@nongnu.org; Wed, 20 Jan 2010 18:20:53 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NXjqy-0007cN-SH for qemu-devel@nongnu.org; Wed, 20 Jan 2010 18:20:52 -0500 Received: from [199.232.76.173] (port=47020 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NXjqy-0007cH-OG for qemu-devel@nongnu.org; Wed, 20 Jan 2010 18:20:48 -0500 Received: from moutng.kundenserver.de ([212.227.17.10]:60464) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NXjqx-0001AU-P1 for qemu-devel@nongnu.org; Wed, 20 Jan 2010 18:20:48 -0500 From: Arnd Bergmann Date: Thu, 21 Jan 2010 00:20:31 +0100 References: <4B549016.6090501@redhat.com> In-Reply-To: <4B549016.6090501@redhat.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201001210020.32467.arnd@arndb.de> Subject: [Qemu-devel] Re: [PATCH] Add definitions for current cpu models.. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: john cooper Cc: "Przywara, Andre" , qemu-devel@nongnu.org, KVM list On Monday 18 January 2010, john cooper wrote: > + .name = "Conroe", > + .level = 2, > + .vendor1 = CPUID_VENDOR_INTEL_1, > + .vendor2 = CPUID_VENDOR_INTEL_2, > + .vendor3 = CPUID_VENDOR_INTEL_3, > + .family = 6, /* P6 */ > + .model = 2, ^^^^^^^^ that looks wrong -- what is model 2 actually? > + .stepping = 3, > + .features = PPRO_FEATURES | > + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | /* note 1 */ > + CPUID_PSE36, /* note 2 */ > + .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_SSSE3, > + .ext2_features = (PPRO_FEATURES & CPUID_EXT2_MASK) | > + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, > + .ext3_features = CPUID_EXT3_LAHF_LM, > + .xlevel = 0x8000000A, > + .model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)", > + }, Celeron_4x0 is a rather bad example, because it is based on the single-core Conroe-L, which is family 6 / model 22 unlike all the dual- and quad-core Merom/Conroe that are model 15. > + { > + .name = "Penryn", > + .level = 2, > + .vendor1 = CPUID_VENDOR_INTEL_1, > + .vendor2 = CPUID_VENDOR_INTEL_2, > + .vendor3 = CPUID_VENDOR_INTEL_3, > + .family = 6, /* P6 */ > + .model = 2, > + .stepping = 3, > + .features = PPRO_FEATURES | > + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | /* note 1 */ > + CPUID_PSE36, /* note 2 */ > + .ext_features = CPUID_EXT_SSE3 | > + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE41, > + .ext2_features = (PPRO_FEATURES & CPUID_EXT2_MASK) | > + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, > + .ext3_features = CPUID_EXT3_LAHF_LM, > + .xlevel = 0x8000000A, > + .model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)", > + }, This would be model 23 for Penryn-class Xeon/Core/Pentium/Celeron processors without L3 cache. > + { > + .name = "Nehalem", > + .level = 2, > + .vendor1 = CPUID_VENDOR_INTEL_1, > + .vendor2 = CPUID_VENDOR_INTEL_2, > + .vendor3 = CPUID_VENDOR_INTEL_3, > + .family = 6, /* P6 */ > + .model = 2, > + .stepping = 3, > + .features = PPRO_FEATURES | > + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | /* note 1 */ > + CPUID_PSE36, /* note 2 */ > + .ext_features = CPUID_EXT_SSE3 | > + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE41 | > + CPUID_EXT_SSE42 | CPUID_EXT_POPCNT, > + .ext2_features = (PPRO_FEATURES & CPUID_EXT2_MASK) | > + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, > + .ext3_features = CPUID_EXT3_LAHF_LM, > + .xlevel = 0x8000000A, > + .model_id = "Intel Core i7 9xx (Nehalem Class Core i7)", > + }, Apparently, not all the i7-9xx CPUs are Nehalem, the i7-980X is supposed to be Westmere, which has more features. Because of the complexity, I'd recommend passing down the *model* number of the emulated CPU, the interesting Intel ones (those supported by KVM) being: 15-6: CedarMill/Presler/Dempsey/Tulsa (Pentium 4/Pentium D/Xeon 50xx/Xeon 71xx) 6-14: Yonah/Sossaman (Celeron M4xx, Core Solo/Duo, Pentium Dual-Core T1000, Xeon ULV) 6-15: Merom/Conroe/Kentsfield/Woodcrest/Clovertown/Tigerton (Celeron M5xx/E1xxx/T1xxx, Pentium T2xxx/T3xxx/E2xxx,Core 2 Solo U2xxx, Core 2 Duo E4xxx/E6xxx/Q6xxx/T5xxx/T7xxx/L7xxx/U7xxx/SP7xxx, Xeon 30xx/32xx/51xx/52xx/72xx/73xx) 6-22: Penryn/Wolfdale/Yorkfield/Harpertown (Celeron 7xx/9xx/SU2xxx/T3xxx/E3xxx, Pentium T4xxx/SU2xxx/SU4xxx/E5xxx/E6xxx, Core 2 Solo SU3xxx, Core 2 Duo Pxxxx/SUxxxx/T6xxx/x8xxx/x9xxx, Xeon 31xx/33xx/52xx/54xx) 6-26: Gainestown/Bloomfield (Xeon 35xx/55xx, Core i7-9xx) 6-28: Atom 6-29: Dunnington (Xeon 74xx) 6-30: Lynnfield/Clarksfield/JasperForest (Xeon 34xx, Core i7-8xx, Core i7-xxxQM, Core i5-7xx) 6-37: Arrandale/Clarkdale (Dual-Core Core i3/i5/i7) 6-44: Gulftown (six-core) Arnd