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diff for duplicates of <20100211034614.GD21755@atomide.com>

diff --git a/a/1.txt b/N1/1.txt
index c6b2089..8b13789 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,350 +1 @@
 
->From 6351a5d5dc656b348074d3ef67a63420c054041a Mon Sep 17 00:00:00 2001
-From: Vimal Singh <vimalsingh@ti.com>
-Date: Wed, 10 Feb 2010 18:22:55 -0800
-Subject: [PATCH] omap3: SDP: Introducing 'board-sdp-flash.c' for flash init
-
-This patch adds 'board-sdp-flash.c', which could be utilized
-by boards similar to 3430SDP. (For ex: 2430sdp, 36030sdp).
-
-This file does initialization for all three flash devices present
-in SDP boards (NOR, NAND, OneNAND), by finding there 'cs' number
-dynamically using switch setting information (S8: 1-4).
-This also expects partition information from core board files (for
-ex: board-3430sdp.c). Which allows to choose different default
-partitions for different boards.
-
-A new structure is created for this purpose: 'flash_partitions'
-in 'mach/board-sdp.h'. This has two members:
-1. struct mtd_partition *parts
-2. int nr_parts
-
-A board file is expected to fill this structure and pass it to
-'sdp-flsash-init'. Partition information should be passed in
-structure array of 'flash_partitions'. Partition information should
-be passed in below sequence in array:
-NOR
-OneNAND
-NAND
-
-Signed-off-by: Vimal Singh <vimalsingh@ti.com>
-Signed-off-by: Tony Lindgren <tony@atomide.com>
-
-diff --git a/arch/arm/mach-omap2/board-sdp-flash.c b/arch/arm/mach-omap2/board-sdp-flash.c
-new file mode 100644
-index 0000000..b1b88de
---- /dev/null
-+++ b/arch/arm/mach-omap2/board-sdp-flash.c
-@@ -0,0 +1,272 @@
-+/*
-+ * board-sdp-flash.c
-+ * Modified from mach-omap2/board-3430sdp-flash.c
-+ *
-+ * Copyright (C) 2009 Nokia Corporation
-+ * Copyright (C) 2009 Texas Instruments
-+ *
-+ * Vimal Singh <vimalsingh@ti.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/mtd/physmap.h>
-+#include <linux/io.h>
-+
-+#include <plat/gpmc.h>
-+#include <plat/nand.h>
-+#include <plat/onenand.h>
-+#include <plat/tc.h>
-+#include <mach/board-sdp.h>
-+
-+#define REG_FPGA_REV			0x10
-+#define REG_FPGA_DIP_SWITCH_INPUT2	0x60
-+#define MAX_SUPPORTED_GPMC_CONFIG	3
-+
-+#define DEBUG_BASE		0x08000000 /* debug board */
-+
-+#define PDC_NOR		1
-+#define PDC_NAND	2
-+#define PDC_ONENAND	3
-+#define DBG_MPDB	4
-+
-+/* various memory sizes */
-+#define FLASH_SIZE_SDPV1	SZ_64M	/* NOR flash (64 Meg aligned) */
-+#define FLASH_SIZE_SDPV2	SZ_128M	/* NOR flash (256 Meg aligned) */
-+
-+/*
-+ * SDP3430 V2 Board CS organization
-+ * Different from SDP3430 V1. Now 4 switches used to specify CS
-+ *
-+ * See also the Switch S8 settings in the comments.
-+ *
-+ * REVISIT: Add support for 2430 SDP
-+ */
-+static const unsigned char chip_sel_sdp[][GPMC_CS_NUM] = {
-+	{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
-+	{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
-+	{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
-+};
-+
-+static struct physmap_flash_data sdp_nor_data = {
-+	.width		= 2,
-+};
-+
-+static struct resource sdp_nor_resource = {
-+	.flags		= IORESOURCE_MEM,
-+};
-+
-+static struct platform_device sdp_nor_device = {
-+	.name		= "physmap-flash",
-+	.id		= 0,
-+	.dev		= {
-+			.platform_data = &sdp_nor_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &sdp_nor_resource,
-+};
-+
-+static void
-+__init board_nor_init(struct flash_partitions sdp_nor_parts, u8 cs)
-+{
-+	int err;
-+
-+	sdp_nor_data.parts	= sdp_nor_parts.parts;
-+	sdp_nor_data.nr_parts	= sdp_nor_parts.nr_parts;
-+
-+	/* Configure start address and size of NOR device */
-+	if (omap_rev() >= OMAP3430_REV_ES1_0) {
-+		err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
-+				(unsigned long *)&sdp_nor_resource.start);
-+		sdp_nor_resource.end = sdp_nor_resource.start
-+					+ FLASH_SIZE_SDPV2 - 1;
-+	} else {
-+		err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
-+				(unsigned long *)&sdp_nor_resource.start);
-+		sdp_nor_resource.end = sdp_nor_resource.start
-+					+ FLASH_SIZE_SDPV1 - 1;
-+	}
-+	if (err < 0) {
-+		printk(KERN_ERR "NOR: Can't request GPMC CS\n");
-+		return;
-+	}
-+	if (platform_device_register(&sdp_nor_device) < 0)
-+		printk(KERN_ERR	"Unable to register NOR device\n");
-+}
-+
-+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
-+		defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
-+static struct omap_onenand_platform_data board_onenand_data = {
-+	.dma_channel	= -1,   /* disable DMA in OMAP OneNAND driver */
-+};
-+
-+static void
-+__init board_onenand_init(struct flash_partitions sdp_onenand_parts, u8 cs)
-+{
-+	board_onenand_data.cs		= cs;
-+	board_onenand_data.parts	= sdp_onenand_parts.parts;
-+	board_onenand_data.nr_parts	= sdp_onenand_parts.nr_parts;
-+
-+	gpmc_onenand_init(&board_onenand_data);
-+}
-+#else
-+static void
-+__init board_onenand_init(struct flash_partitions sdp_onenand_parts, u8 cs)
-+{
-+}
-+#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
-+
-+#if defined(CONFIG_MTD_NAND_OMAP2) || \
-+		defined(CONFIG_MTD_NAND_OMAP2_MODULE)
-+
-+/* Note that all values in this struct are in nanoseconds */
-+static struct gpmc_timings nand_timings = {
-+
-+	.sync_clk = 0,
-+
-+	.cs_on = 0,
-+	.cs_rd_off = 36,
-+	.cs_wr_off = 36,
-+
-+	.adv_on = 6,
-+	.adv_rd_off = 24,
-+	.adv_wr_off = 36,
-+
-+	.we_off = 30,
-+	.oe_off = 48,
-+
-+	.access = 54,
-+	.rd_cycle = 72,
-+	.wr_cycle = 72,
-+
-+	.wr_access = 30,
-+	.wr_data_mux_bus = 0,
-+};
-+
-+static struct omap_nand_platform_data sdp_nand_data = {
-+	.nand_setup	= NULL,
-+	.gpmc_t		= &nand_timings,
-+	.dma_channel	= -1,		/* disable DMA in OMAP NAND driver */
-+	.dev_ready	= NULL,
-+	.devsize	= 0,	/* '0' for 8-bit, '1' for 16-bit device */
-+};
-+
-+static void
-+__init board_nand_init(struct flash_partitions sdp_nand_parts, u8 cs)
-+{
-+	sdp_nand_data.cs		= cs;
-+	sdp_nand_data.parts		= sdp_nand_parts.parts;
-+	sdp_nand_data.nr_parts		= sdp_nand_parts.nr_parts;
-+
-+	sdp_nand_data.gpmc_cs_baseaddr	= (void *)(OMAP34XX_GPMC_VIRT +
-+							GPMC_CS0_BASE +
-+							cs * GPMC_CS_SIZE);
-+	sdp_nand_data.gpmc_baseaddr	 = (void *) (OMAP34XX_GPMC_VIRT);
-+
-+	gpmc_nand_init(&sdp_nand_data);
-+}
-+#else
-+static void
-+__init board_nand_init(struct flash_partitions sdp_nand_parts, u8 cs)
-+{
-+}
-+#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
-+
-+/**
-+ * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
-+ * the various cs values.
-+ */
-+static u8 get_gpmc0_type(void)
-+{
-+	u8 cs = 0;
-+	void __iomem *fpga_map_addr;
-+
-+	fpga_map_addr = ioremap(DEBUG_BASE, 4096);
-+	if (!fpga_map_addr)
-+		return -ENOMEM;
-+
-+	if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
-+		/* we dont have an DEBUG FPGA??? */
-+		/* Depend on #defines!! default to strata boot return param */
-+		goto unmap;
-+
-+	/* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
-+	cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
-+
-+	/* ES2.0 SDP's onwards 4 dip switches are provided for CS */
-+	if (omap_rev() >= OMAP3430_REV_ES1_0)
-+		/* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
-+		cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
-+			((cs & 2) << 1) | ((cs & 1) << 3);
-+	else
-+		/* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
-+		cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
-+unmap:
-+	iounmap(fpga_map_addr);
-+	return cs;
-+}
-+
-+/**
-+ * sdp3430_flash_init - Identify devices connected to GPMC and register.
-+ *
-+ * @return - void.
-+ */
-+void __init sdp_flash_init(struct flash_partitions sdp_partition_info[])
-+{
-+	u8		cs = 0;
-+	u8		norcs = GPMC_CS_NUM + 1;
-+	u8		nandcs = GPMC_CS_NUM + 1;
-+	u8		onenandcs = GPMC_CS_NUM + 1;
-+	u8		idx;
-+	unsigned char	*config_sel = NULL;
-+
-+	/* REVISIT: Is this return correct idx for 2430 SDP?
-+	 * for which cs configuration matches for 2430 SDP?
-+	 */
-+	idx = get_gpmc0_type();
-+	if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
-+		printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs);
-+		return;
-+	}
-+	config_sel = (unsigned char *)(chip_sel_sdp[idx]);
-+
-+	while (cs < GPMC_CS_NUM) {
-+		switch (config_sel[cs]) {
-+		case PDC_NOR:
-+			if (norcs > GPMC_CS_NUM)
-+				norcs = cs;
-+			break;
-+		case PDC_NAND:
-+			if (nandcs > GPMC_CS_NUM)
-+				nandcs = cs;
-+			break;
-+		case PDC_ONENAND:
-+			if (onenandcs > GPMC_CS_NUM)
-+				onenandcs = cs;
-+			break;
-+		};
-+		cs++;
-+	}
-+
-+	if (norcs > GPMC_CS_NUM)
-+		printk(KERN_INFO "OneNAND: Unable to find configuration "
-+				" in GPMC\n ");
-+	else
-+		board_nor_init(sdp_partition_info[0], norcs);
-+
-+	if (onenandcs > GPMC_CS_NUM)
-+		printk(KERN_INFO "OneNAND: Unable to find configuration "
-+				" in GPMC\n ");
-+	else
-+		board_onenand_init(sdp_partition_info[1], onenandcs);
-+
-+	if (nandcs > GPMC_CS_NUM)
-+		printk(KERN_INFO "NAND: Unable to find configuration "
-+				" in GPMC\n ");
-+	else
-+		board_nand_init(sdp_partition_info[2], nandcs);
-+}
-diff --git a/arch/arm/mach-omap2/include/mach/board-sdp.h b/arch/arm/mach-omap2/include/mach/board-sdp.h
-new file mode 100644
-index 0000000..465169c
---- /dev/null
-+++ b/arch/arm/mach-omap2/include/mach/board-sdp.h
-@@ -0,0 +1,21 @@
-+/*
-+ *  board-sdp.h
-+ *
-+ *  Information structures for SDP-specific board config data
-+ *
-+ *  Copyright (C) 2009 Nokia Corporation
-+ *  Copyright (C) 2009 Texas Instruments
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+
-+struct flash_partitions {
-+	struct mtd_partition *parts;
-+	int nr_parts;
-+};
-+
-+extern void sdp_flash_init(struct flash_partitions []);
-diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
-index 3f3609a..145838a 100644
---- a/arch/arm/plat-omap/include/plat/gpmc.h
-+++ b/arch/arm/plat-omap/include/plat/gpmc.h
-@@ -27,6 +27,8 @@
- 
- #define GPMC_CONFIG		0x50
- #define GPMC_STATUS		0x54
-+#define GPMC_CS0_BASE		0x60
-+#define GPMC_CS_SIZE		0x30
- 
- #define GPMC_CONFIG1_WRAPBURST_SUPP     (1 << 31)
- #define GPMC_CONFIG1_READMULTIPLE_SUPP  (1 << 30)
diff --git a/a/content_digest b/N1/content_digest
index 843f5a8..12be78e 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,360 +1,9 @@
  "ref\020100211033310.1624.80025.stgit@baageli.muru.com\0"
- "From\0Tony Lindgren <tony@atomide.com>\0"
+ "From\0tony@atomide.com (Tony Lindgren)\0"
  "Subject\0[PATCH 16/17] omap3: SDP: Introducing 'board-sdp-flash.c' for flash init\0"
  "Date\0Wed, 10 Feb 2010 19:46:14 -0800\0"
  "To\0linux-arm-kernel@lists.infradead.org\0"
- "Cc\0linux-omap@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
- "\n"
- ">From 6351a5d5dc656b348074d3ef67a63420c054041a Mon Sep 17 00:00:00 2001\n"
- "From: Vimal Singh <vimalsingh@ti.com>\n"
- "Date: Wed, 10 Feb 2010 18:22:55 -0800\n"
- "Subject: [PATCH] omap3: SDP: Introducing 'board-sdp-flash.c' for flash init\n"
- "\n"
- "This patch adds 'board-sdp-flash.c', which could be utilized\n"
- "by boards similar to 3430SDP. (For ex: 2430sdp, 36030sdp).\n"
- "\n"
- "This file does initialization for all three flash devices present\n"
- "in SDP boards (NOR, NAND, OneNAND), by finding there 'cs' number\n"
- "dynamically using switch setting information (S8: 1-4).\n"
- "This also expects partition information from core board files (for\n"
- "ex: board-3430sdp.c). Which allows to choose different default\n"
- "partitions for different boards.\n"
- "\n"
- "A new structure is created for this purpose: 'flash_partitions'\n"
- "in 'mach/board-sdp.h'. This has two members:\n"
- "1. struct mtd_partition *parts\n"
- "2. int nr_parts\n"
- "\n"
- "A board file is expected to fill this structure and pass it to\n"
- "'sdp-flsash-init'. Partition information should be passed in\n"
- "structure array of 'flash_partitions'. Partition information should\n"
- "be passed in below sequence in array:\n"
- "NOR\n"
- "OneNAND\n"
- "NAND\n"
- "\n"
- "Signed-off-by: Vimal Singh <vimalsingh@ti.com>\n"
- "Signed-off-by: Tony Lindgren <tony@atomide.com>\n"
- "\n"
- "diff --git a/arch/arm/mach-omap2/board-sdp-flash.c b/arch/arm/mach-omap2/board-sdp-flash.c\n"
- "new file mode 100644\n"
- "index 0000000..b1b88de\n"
- "--- /dev/null\n"
- "+++ b/arch/arm/mach-omap2/board-sdp-flash.c\n"
- "@@ -0,0 +1,272 @@\n"
- "+/*\n"
- "+ * board-sdp-flash.c\n"
- "+ * Modified from mach-omap2/board-3430sdp-flash.c\n"
- "+ *\n"
- "+ * Copyright (C) 2009 Nokia Corporation\n"
- "+ * Copyright (C) 2009 Texas Instruments\n"
- "+ *\n"
- "+ * Vimal Singh <vimalsingh@ti.com>\n"
- "+ *\n"
- "+ * This program is free software; you can redistribute it and/or modify\n"
- "+ * it under the terms of the GNU General Public License version 2 as\n"
- "+ * published by the Free Software Foundation.\n"
- "+ */\n"
- "+\n"
- "+#include <linux/kernel.h>\n"
- "+#include <linux/platform_device.h>\n"
- "+#include <linux/mtd/physmap.h>\n"
- "+#include <linux/io.h>\n"
- "+\n"
- "+#include <plat/gpmc.h>\n"
- "+#include <plat/nand.h>\n"
- "+#include <plat/onenand.h>\n"
- "+#include <plat/tc.h>\n"
- "+#include <mach/board-sdp.h>\n"
- "+\n"
- "+#define REG_FPGA_REV\t\t\t0x10\n"
- "+#define REG_FPGA_DIP_SWITCH_INPUT2\t0x60\n"
- "+#define MAX_SUPPORTED_GPMC_CONFIG\t3\n"
- "+\n"
- "+#define DEBUG_BASE\t\t0x08000000 /* debug board */\n"
- "+\n"
- "+#define PDC_NOR\t\t1\n"
- "+#define PDC_NAND\t2\n"
- "+#define PDC_ONENAND\t3\n"
- "+#define DBG_MPDB\t4\n"
- "+\n"
- "+/* various memory sizes */\n"
- "+#define FLASH_SIZE_SDPV1\tSZ_64M\t/* NOR flash (64 Meg aligned) */\n"
- "+#define FLASH_SIZE_SDPV2\tSZ_128M\t/* NOR flash (256 Meg aligned) */\n"
- "+\n"
- "+/*\n"
- "+ * SDP3430 V2 Board CS organization\n"
- "+ * Different from SDP3430 V1. Now 4 switches used to specify CS\n"
- "+ *\n"
- "+ * See also the Switch S8 settings in the comments.\n"
- "+ *\n"
- "+ * REVISIT: Add support for 2430 SDP\n"
- "+ */\n"
- "+static const unsigned char chip_sel_sdp[][GPMC_CS_NUM] = {\n"
- "+\t{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */\n"
- "+\t{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */\n"
- "+\t{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */\n"
- "+};\n"
- "+\n"
- "+static struct physmap_flash_data sdp_nor_data = {\n"
- "+\t.width\t\t= 2,\n"
- "+};\n"
- "+\n"
- "+static struct resource sdp_nor_resource = {\n"
- "+\t.flags\t\t= IORESOURCE_MEM,\n"
- "+};\n"
- "+\n"
- "+static struct platform_device sdp_nor_device = {\n"
- "+\t.name\t\t= \"physmap-flash\",\n"
- "+\t.id\t\t= 0,\n"
- "+\t.dev\t\t= {\n"
- "+\t\t\t.platform_data = &sdp_nor_data,\n"
- "+\t},\n"
- "+\t.num_resources\t= 1,\n"
- "+\t.resource\t= &sdp_nor_resource,\n"
- "+};\n"
- "+\n"
- "+static void\n"
- "+__init board_nor_init(struct flash_partitions sdp_nor_parts, u8 cs)\n"
- "+{\n"
- "+\tint err;\n"
- "+\n"
- "+\tsdp_nor_data.parts\t= sdp_nor_parts.parts;\n"
- "+\tsdp_nor_data.nr_parts\t= sdp_nor_parts.nr_parts;\n"
- "+\n"
- "+\t/* Configure start address and size of NOR device */\n"
- "+\tif (omap_rev() >= OMAP3430_REV_ES1_0) {\n"
- "+\t\terr = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,\n"
- "+\t\t\t\t(unsigned long *)&sdp_nor_resource.start);\n"
- "+\t\tsdp_nor_resource.end = sdp_nor_resource.start\n"
- "+\t\t\t\t\t+ FLASH_SIZE_SDPV2 - 1;\n"
- "+\t} else {\n"
- "+\t\terr = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,\n"
- "+\t\t\t\t(unsigned long *)&sdp_nor_resource.start);\n"
- "+\t\tsdp_nor_resource.end = sdp_nor_resource.start\n"
- "+\t\t\t\t\t+ FLASH_SIZE_SDPV1 - 1;\n"
- "+\t}\n"
- "+\tif (err < 0) {\n"
- "+\t\tprintk(KERN_ERR \"NOR: Can't request GPMC CS\\n\");\n"
- "+\t\treturn;\n"
- "+\t}\n"
- "+\tif (platform_device_register(&sdp_nor_device) < 0)\n"
- "+\t\tprintk(KERN_ERR\t\"Unable to register NOR device\\n\");\n"
- "+}\n"
- "+\n"
- "+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \\\n"
- "+\t\tdefined(CONFIG_MTD_ONENAND_OMAP2_MODULE)\n"
- "+static struct omap_onenand_platform_data board_onenand_data = {\n"
- "+\t.dma_channel\t= -1,   /* disable DMA in OMAP OneNAND driver */\n"
- "+};\n"
- "+\n"
- "+static void\n"
- "+__init board_onenand_init(struct flash_partitions sdp_onenand_parts, u8 cs)\n"
- "+{\n"
- "+\tboard_onenand_data.cs\t\t= cs;\n"
- "+\tboard_onenand_data.parts\t= sdp_onenand_parts.parts;\n"
- "+\tboard_onenand_data.nr_parts\t= sdp_onenand_parts.nr_parts;\n"
- "+\n"
- "+\tgpmc_onenand_init(&board_onenand_data);\n"
- "+}\n"
- "+#else\n"
- "+static void\n"
- "+__init board_onenand_init(struct flash_partitions sdp_onenand_parts, u8 cs)\n"
- "+{\n"
- "+}\n"
- "+#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */\n"
- "+\n"
- "+#if defined(CONFIG_MTD_NAND_OMAP2) || \\\n"
- "+\t\tdefined(CONFIG_MTD_NAND_OMAP2_MODULE)\n"
- "+\n"
- "+/* Note that all values in this struct are in nanoseconds */\n"
- "+static struct gpmc_timings nand_timings = {\n"
- "+\n"
- "+\t.sync_clk = 0,\n"
- "+\n"
- "+\t.cs_on = 0,\n"
- "+\t.cs_rd_off = 36,\n"
- "+\t.cs_wr_off = 36,\n"
- "+\n"
- "+\t.adv_on = 6,\n"
- "+\t.adv_rd_off = 24,\n"
- "+\t.adv_wr_off = 36,\n"
- "+\n"
- "+\t.we_off = 30,\n"
- "+\t.oe_off = 48,\n"
- "+\n"
- "+\t.access = 54,\n"
- "+\t.rd_cycle = 72,\n"
- "+\t.wr_cycle = 72,\n"
- "+\n"
- "+\t.wr_access = 30,\n"
- "+\t.wr_data_mux_bus = 0,\n"
- "+};\n"
- "+\n"
- "+static struct omap_nand_platform_data sdp_nand_data = {\n"
- "+\t.nand_setup\t= NULL,\n"
- "+\t.gpmc_t\t\t= &nand_timings,\n"
- "+\t.dma_channel\t= -1,\t\t/* disable DMA in OMAP NAND driver */\n"
- "+\t.dev_ready\t= NULL,\n"
- "+\t.devsize\t= 0,\t/* '0' for 8-bit, '1' for 16-bit device */\n"
- "+};\n"
- "+\n"
- "+static void\n"
- "+__init board_nand_init(struct flash_partitions sdp_nand_parts, u8 cs)\n"
- "+{\n"
- "+\tsdp_nand_data.cs\t\t= cs;\n"
- "+\tsdp_nand_data.parts\t\t= sdp_nand_parts.parts;\n"
- "+\tsdp_nand_data.nr_parts\t\t= sdp_nand_parts.nr_parts;\n"
- "+\n"
- "+\tsdp_nand_data.gpmc_cs_baseaddr\t= (void *)(OMAP34XX_GPMC_VIRT +\n"
- "+\t\t\t\t\t\t\tGPMC_CS0_BASE +\n"
- "+\t\t\t\t\t\t\tcs * GPMC_CS_SIZE);\n"
- "+\tsdp_nand_data.gpmc_baseaddr\t = (void *) (OMAP34XX_GPMC_VIRT);\n"
- "+\n"
- "+\tgpmc_nand_init(&sdp_nand_data);\n"
- "+}\n"
- "+#else\n"
- "+static void\n"
- "+__init board_nand_init(struct flash_partitions sdp_nand_parts, u8 cs)\n"
- "+{\n"
- "+}\n"
- "+#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */\n"
- "+\n"
- "+/**\n"
- "+ * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get\n"
- "+ * the various cs values.\n"
- "+ */\n"
- "+static u8 get_gpmc0_type(void)\n"
- "+{\n"
- "+\tu8 cs = 0;\n"
- "+\tvoid __iomem *fpga_map_addr;\n"
- "+\n"
- "+\tfpga_map_addr = ioremap(DEBUG_BASE, 4096);\n"
- "+\tif (!fpga_map_addr)\n"
- "+\t\treturn -ENOMEM;\n"
- "+\n"
- "+\tif (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))\n"
- "+\t\t/* we dont have an DEBUG FPGA??? */\n"
- "+\t\t/* Depend on #defines!! default to strata boot return param */\n"
- "+\t\tgoto unmap;\n"
- "+\n"
- "+\t/* S8-DIP-OFF = 1, S8-DIP-ON = 0 */\n"
- "+\tcs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;\n"
- "+\n"
- "+\t/* ES2.0 SDP's onwards 4 dip switches are provided for CS */\n"
- "+\tif (omap_rev() >= OMAP3430_REV_ES1_0)\n"
- "+\t\t/* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */\n"
- "+\t\tcs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |\n"
- "+\t\t\t((cs & 2) << 1) | ((cs & 1) << 3);\n"
- "+\telse\n"
- "+\t\t/* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */\n"
- "+\t\tcs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);\n"
- "+unmap:\n"
- "+\tiounmap(fpga_map_addr);\n"
- "+\treturn cs;\n"
- "+}\n"
- "+\n"
- "+/**\n"
- "+ * sdp3430_flash_init - Identify devices connected to GPMC and register.\n"
- "+ *\n"
- "+ * @return - void.\n"
- "+ */\n"
- "+void __init sdp_flash_init(struct flash_partitions sdp_partition_info[])\n"
- "+{\n"
- "+\tu8\t\tcs = 0;\n"
- "+\tu8\t\tnorcs = GPMC_CS_NUM + 1;\n"
- "+\tu8\t\tnandcs = GPMC_CS_NUM + 1;\n"
- "+\tu8\t\tonenandcs = GPMC_CS_NUM + 1;\n"
- "+\tu8\t\tidx;\n"
- "+\tunsigned char\t*config_sel = NULL;\n"
- "+\n"
- "+\t/* REVISIT: Is this return correct idx for 2430 SDP?\n"
- "+\t * for which cs configuration matches for 2430 SDP?\n"
- "+\t */\n"
- "+\tidx = get_gpmc0_type();\n"
- "+\tif (idx >= MAX_SUPPORTED_GPMC_CONFIG) {\n"
- "+\t\tprintk(KERN_ERR \"%s: Invalid chip select: %d\\n\", __func__, cs);\n"
- "+\t\treturn;\n"
- "+\t}\n"
- "+\tconfig_sel = (unsigned char *)(chip_sel_sdp[idx]);\n"
- "+\n"
- "+\twhile (cs < GPMC_CS_NUM) {\n"
- "+\t\tswitch (config_sel[cs]) {\n"
- "+\t\tcase PDC_NOR:\n"
- "+\t\t\tif (norcs > GPMC_CS_NUM)\n"
- "+\t\t\t\tnorcs = cs;\n"
- "+\t\t\tbreak;\n"
- "+\t\tcase PDC_NAND:\n"
- "+\t\t\tif (nandcs > GPMC_CS_NUM)\n"
- "+\t\t\t\tnandcs = cs;\n"
- "+\t\t\tbreak;\n"
- "+\t\tcase PDC_ONENAND:\n"
- "+\t\t\tif (onenandcs > GPMC_CS_NUM)\n"
- "+\t\t\t\tonenandcs = cs;\n"
- "+\t\t\tbreak;\n"
- "+\t\t};\n"
- "+\t\tcs++;\n"
- "+\t}\n"
- "+\n"
- "+\tif (norcs > GPMC_CS_NUM)\n"
- "+\t\tprintk(KERN_INFO \"OneNAND: Unable to find configuration \"\n"
- "+\t\t\t\t\" in GPMC\\n \");\n"
- "+\telse\n"
- "+\t\tboard_nor_init(sdp_partition_info[0], norcs);\n"
- "+\n"
- "+\tif (onenandcs > GPMC_CS_NUM)\n"
- "+\t\tprintk(KERN_INFO \"OneNAND: Unable to find configuration \"\n"
- "+\t\t\t\t\" in GPMC\\n \");\n"
- "+\telse\n"
- "+\t\tboard_onenand_init(sdp_partition_info[1], onenandcs);\n"
- "+\n"
- "+\tif (nandcs > GPMC_CS_NUM)\n"
- "+\t\tprintk(KERN_INFO \"NAND: Unable to find configuration \"\n"
- "+\t\t\t\t\" in GPMC\\n \");\n"
- "+\telse\n"
- "+\t\tboard_nand_init(sdp_partition_info[2], nandcs);\n"
- "+}\n"
- "diff --git a/arch/arm/mach-omap2/include/mach/board-sdp.h b/arch/arm/mach-omap2/include/mach/board-sdp.h\n"
- "new file mode 100644\n"
- "index 0000000..465169c\n"
- "--- /dev/null\n"
- "+++ b/arch/arm/mach-omap2/include/mach/board-sdp.h\n"
- "@@ -0,0 +1,21 @@\n"
- "+/*\n"
- "+ *  board-sdp.h\n"
- "+ *\n"
- "+ *  Information structures for SDP-specific board config data\n"
- "+ *\n"
- "+ *  Copyright (C) 2009 Nokia Corporation\n"
- "+ *  Copyright (C) 2009 Texas Instruments\n"
- "+ *\n"
- "+ * This program is free software; you can redistribute it and/or modify\n"
- "+ * it under the terms of the GNU General Public License version 2 as\n"
- "+ * published by the Free Software Foundation.\n"
- "+ */\n"
- "+#include <linux/mtd/mtd.h>\n"
- "+#include <linux/mtd/partitions.h>\n"
- "+\n"
- "+struct flash_partitions {\n"
- "+\tstruct mtd_partition *parts;\n"
- "+\tint nr_parts;\n"
- "+};\n"
- "+\n"
- "+extern void sdp_flash_init(struct flash_partitions []);\n"
- "diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h\n"
- "index 3f3609a..145838a 100644\n"
- "--- a/arch/arm/plat-omap/include/plat/gpmc.h\n"
- "+++ b/arch/arm/plat-omap/include/plat/gpmc.h\n"
- "@@ -27,6 +27,8 @@\n"
- " \n"
- " #define GPMC_CONFIG\t\t0x50\n"
- " #define GPMC_STATUS\t\t0x54\n"
- "+#define GPMC_CS0_BASE\t\t0x60\n"
- "+#define GPMC_CS_SIZE\t\t0x30\n"
- " \n"
- " #define GPMC_CONFIG1_WRAPBURST_SUPP     (1 << 31)\n"
-  #define GPMC_CONFIG1_READMULTIPLE_SUPP  (1 << 30)
 
-fa6ef064029644e41e7b42faca011677b56d35d464b557e422542d5a4c1f49ff
+a4a3a4129cfa2c08ef70568837c09220e028feb46bb17db8b485a41ae59913a6

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