From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ingo Molnar <mingo@elte.hu>
Subject: Re: KVM PMU virtualization
Date: Fri, 26 Feb 2010 14:27:51 +0100
Message-ID: <20100226132751.GA20013@elte.hu>
References: <4B87987A.2020302@redhat.com>
 <20100226104437.GB7463@elte.hu>
 <4B87AF44.9090702@redhat.com>
 <20100226114217.GI7463@elte.hu>
 <4B87B5DE.30503@redhat.com>
 <20100226120750.GA11578@elte.hu>
 <4B87BC74.7050207@redhat.com>
 <20100226123850.GA19476@elte.hu>
 <4B87C6C4.3040407@redhat.com>
 <4B87C8EC.8080304@redhat.com>
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Cc: Avi Kivity <avi@redhat.com>, Joerg Roedel <joro@8bytes.org>,
	KVM General <kvm@vger.kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Zachary Amsden <zamsden@redhat.com>,
	Gleb Natapov <gleb@redhat.com>, ming.m.lin@intel.com,
	"Zhang, Yanmin" <yanmin_zhang@linux.intel.com>,
	Peter Zijlstra <a.p.zijlstra@chello.nl>,
	Thomas Gleixner <tglx@linutronix.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Arjan van de Ven <arjan@infradead.org>,
	Fr??d??ric Weisbecker <fweisbec@gmail.com>,
	Arnaldo Carvalho de Melo <acme@redhat.com>
To: Jes Sorensen <Jes.Sorensen@redhat.com>
Return-path: <kvm-owner@vger.kernel.org>
Received: from mx2.mail.elte.hu ([157.181.151.9]:41110 "EHLO mx2.mail.elte.hu"
	rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP
	id S935712Ab0BZN2H (ORCPT <rfc822;kvm@vger.kernel.org>);
	Fri, 26 Feb 2010 08:28:07 -0500
Content-Disposition: inline
In-Reply-To: <4B87C8EC.8080304@redhat.com>
Sender: kvm-owner@vger.kernel.org
List-ID: <kvm.vger.kernel.org>


* Jes Sorensen <Jes.Sorensen@redhat.com> wrote:

> > Agree about favouring modern processors.
> 
> You certainly cannot emulate the Core2 on a P4. The Core2 is Perfmon v2, 
> whereas Nehalem and Atom are v3 if I remember correctly. [...]

Of course you can emulate a good portion of it, as long as there's perf 
support on the host side for P4.

If the guest programs a cachemiss event, you program a cachemiss perf event on 
the host and feed its values to the emulated MSR state. You _dont_ program the 
raw PMU on the host side - just use the API i outlined to get struct 
perf_event.

The emulation wont be perfect: not all events will count and not all events 
will be available in a P4 (and some Core2 events might not even make sense in 
a P4), but that is reality as well: often documented events dont count, and 
often non-documented events count.

What matters to 99.9% of people who actually use this stuff is a few core sets 
of events - which are available in P4s and in Core2 as well. Cycles, 
instructions, branches, maybe cache-misses. Sometimes FPU stuff.

For Linux<->Linux the sanest, tier-1 approach would be to map sys_perf_open() 
on the guest side over to the host, transparently, via a paravirt driver.

	Ingo