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From: Jamie Lokier <jamie@shareable.org>
To: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Cc: linux-mtd@lists.infradead.org, Leo Barnes <leo.barnes@algotrim.com>
Subject: Re: Enabling D-cache for OneNAND bufferram
Date: Fri, 26 Mar 2010 02:39:22 +0000	[thread overview]
Message-ID: <20100326023922.GM19308@shareable.org> (raw)
In-Reply-To: <OF3A2BD3B7.06165486-ONC12576F1.003DEF5F-C12576F1.003E8F26@transmode.se>

Joakim Tjernlund wrote:
> ioremap returns a *second* mapping to the same RAM so you first
> original mapping should be fine.

Note that having two mappings with different attributes to the same
address is architecturally prohibited on (at least) some ARMs.
I.e. it may not behave correctly.

Then again, dma_alloc_coherent has to do it.  But be careful!
Remember to flush the cache before unmapping the cached area
if the driver has an exit function.

-- Jamie

  parent reply	other threads:[~2010-03-26  2:39 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-03-24 13:21 Enabling D-cache for OneNAND bufferram Leo Barnes
2010-03-24 15:34 ` Joakim Tjernlund
2010-03-25 10:57   ` Leo Barnes
2010-03-25 11:23     ` Joakim Tjernlund
2010-03-25 16:38       ` massimo cirillo
2010-03-26  2:39       ` Jamie Lokier [this message]
  -- strict thread matches above, loose matches on Subject: below --
2010-03-28 17:51 Enabling D-cache for OneNAND BufferRAM Leo Barnes

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