From: Aurelien Jarno <aurelien@aurel32.net>
To: Richard Henderson <rth@twiddle.net>
Cc: blauwirbel@gmail.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 1/9] tcg: Remove jmp opcode.
Date: Fri, 26 Mar 2010 22:30:24 +0100 [thread overview]
Message-ID: <20100326213024.GA15194@volta.aurel32.net> (raw)
In-Reply-To: <e5fc8c332cd558bd1f259ff8c46d126329419d64.1269029456.git.rth@twiddle.net>
On Fri, Mar 19, 2010 at 10:40:59AM -0700, Richard Henderson wrote:
> This opcode is unused. It was incorrectly implemented
> on at least one host. Just remove it.
>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
> tcg/README | 7 +------
> tcg/arm/tcg-target.c | 7 -------
> tcg/hppa/tcg-target.c | 5 -----
> tcg/i386/tcg-target.c | 9 ---------
> tcg/mips/tcg-target.c | 5 -----
> tcg/ppc/tcg-target.c | 10 ----------
> tcg/ppc64/tcg-target.c | 10 ----------
> tcg/sparc/tcg-target.c | 2 --
> tcg/tcg-opc.h | 1 -
> tcg/x86_64/tcg-target.c | 8 --------
> 10 files changed, 1 insertions(+), 63 deletions(-)
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
> diff --git a/tcg/README b/tcg/README
> index 281c114..53737fb 100644
> --- a/tcg/README
> +++ b/tcg/README
> @@ -88,8 +88,7 @@ supported.
>
> * Branches:
>
> -Use the instruction 'br' to jump to a label. Use 'jmp' to jump to an
> -explicit address. Conditional branches can only jump to labels.
> +Use the instruction 'br' to jump to a label.
>
> 3.3) Code Optimizations
>
> @@ -129,10 +128,6 @@ call function 'ptr' (pointer type)
>
> ********* Jumps/Labels
>
> -* jmp t0
> -
> -Absolute jump to address t0 (pointer type).
> -
> * set_label $label
>
> Define label 'label' at the current program point.
> diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
> index 35e14c1..167728a 100644
> --- a/tcg/arm/tcg-target.c
> +++ b/tcg/arm/tcg-target.c
> @@ -1312,12 +1312,6 @@ static inline void tcg_out_op(TCGContext *s, int opc,
> else
> tcg_out_callr(s, COND_AL, args[0]);
> break;
> - case INDEX_op_jmp:
> - if (const_args[0])
> - tcg_out_goto(s, COND_AL, args[0]);
> - else
> - tcg_out_bx(s, COND_AL, args[0]);
> - break;
> case INDEX_op_br:
> tcg_out_goto_label(s, COND_AL, args[0]);
> break;
> @@ -1540,7 +1534,6 @@ static const TCGTargetOpDef arm_op_defs[] = {
> { INDEX_op_exit_tb, { } },
> { INDEX_op_goto_tb, { } },
> { INDEX_op_call, { "ri" } },
> - { INDEX_op_jmp, { "ri" } },
> { INDEX_op_br, { } },
>
> { INDEX_op_mov_i32, { "r", "r" } },
> diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c
> index 4677971..98f04fe 100644
> --- a/tcg/hppa/tcg-target.c
> +++ b/tcg/hppa/tcg-target.c
> @@ -753,10 +753,6 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
> tcg_out32(s, BLE_SR4 | INSN_R2(args[0]));
> tcg_out_mov(s, TCG_REG_RP, TCG_REG_R31);
> break;
> - case INDEX_op_jmp:
> - fprintf(stderr, "unimplemented jmp\n");
> - tcg_abort();
> - break;
> case INDEX_op_br:
> fprintf(stderr, "unimplemented br\n");
> tcg_abort();
> @@ -892,7 +888,6 @@ static const TCGTargetOpDef hppa_op_defs[] = {
> { INDEX_op_goto_tb, { } },
>
> { INDEX_op_call, { "r" } },
> - { INDEX_op_jmp, { "r" } },
> { INDEX_op_br, { } },
>
> { INDEX_op_mov_i32, { "r", "r" } },
> diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
> index 09c73b4..c7af11c 100644
> --- a/tcg/i386/tcg-target.c
> +++ b/tcg/i386/tcg-target.c
> @@ -1001,14 +1001,6 @@ static inline void tcg_out_op(TCGContext *s, int opc,
> tcg_out_modrm(s, 0xff, 2, args[0]);
> }
> break;
> - case INDEX_op_jmp:
> - if (const_args[0]) {
> - tcg_out8(s, 0xe9);
> - tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
> - } else {
> - tcg_out_modrm(s, 0xff, 4, args[0]);
> - }
> - break;
> case INDEX_op_br:
> tcg_out_jxx(s, JCC_JMP, args[0], 0);
> break;
> @@ -1226,7 +1218,6 @@ static const TCGTargetOpDef x86_op_defs[] = {
> { INDEX_op_exit_tb, { } },
> { INDEX_op_goto_tb, { } },
> { INDEX_op_call, { "ri" } },
> - { INDEX_op_jmp, { "ri" } },
> { INDEX_op_br, { } },
> { INDEX_op_mov_i32, { "r", "r" } },
> { INDEX_op_movi_i32, { "r" } },
> diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
> index ec687ad..cb3adf3 100644
> --- a/tcg/mips/tcg-target.c
> +++ b/tcg/mips/tcg-target.c
> @@ -1115,10 +1115,6 @@ static inline void tcg_out_op(TCGContext *s, int opc,
> tcg_out_opc_reg(s, OPC_JALR, TCG_REG_RA, args[0], 0);
> tcg_out_nop(s);
> break;
> - case INDEX_op_jmp:
> - tcg_out_opc_reg(s, OPC_JR, 0, args[0], 0);
> - tcg_out_nop(s);
> - break;
> case INDEX_op_br:
> tcg_out_brcond(s, TCG_COND_EQ, TCG_REG_ZERO, TCG_REG_ZERO, args[0]);
> break;
> @@ -1326,7 +1322,6 @@ static const TCGTargetOpDef mips_op_defs[] = {
> { INDEX_op_exit_tb, { } },
> { INDEX_op_goto_tb, { } },
> { INDEX_op_call, { "C" } },
> - { INDEX_op_jmp, { "r" } },
> { INDEX_op_br, { } },
>
> { INDEX_op_mov_i32, { "r", "r" } },
> diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
> index 81633ed..4098a4f 100644
> --- a/tcg/ppc/tcg-target.c
> +++ b/tcg/ppc/tcg-target.c
> @@ -1331,15 +1331,6 @@ static void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
> case INDEX_op_call:
> tcg_out_call (s, args[0], const_args[0]);
> break;
> - case INDEX_op_jmp:
> - if (const_args[0]) {
> - tcg_out_b (s, 0, args[0]);
> - }
> - else {
> - tcg_out32 (s, MTSPR | RS (args[0]) | CTR);
> - tcg_out32 (s, BCCTR | BO_ALWAYS);
> - }
> - break;
> case INDEX_op_movi_i32:
> tcg_out_movi(s, TCG_TYPE_I32, args[0], args[1]);
> break;
> @@ -1721,7 +1712,6 @@ static const TCGTargetOpDef ppc_op_defs[] = {
> { INDEX_op_exit_tb, { } },
> { INDEX_op_goto_tb, { } },
> { INDEX_op_call, { "ri" } },
> - { INDEX_op_jmp, { "ri" } },
> { INDEX_op_br, { } },
>
> { INDEX_op_mov_i32, { "r", "r" } },
> diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
> index cf36c55..4087d17 100644
> --- a/tcg/ppc64/tcg-target.c
> +++ b/tcg/ppc64/tcg-target.c
> @@ -1242,15 +1242,6 @@ static void tcg_out_op (TCGContext *s, int opc, const TCGArg *args,
> case INDEX_op_call:
> tcg_out_call (s, args[0], const_args[0]);
> break;
> - case INDEX_op_jmp:
> - if (const_args[0]) {
> - tcg_out_b (s, 0, args[0]);
> - }
> - else {
> - tcg_out32 (s, MTSPR | RS (args[0]) | CTR);
> - tcg_out32 (s, BCCTR | BO_ALWAYS);
> - }
> - break;
> case INDEX_op_movi_i32:
> tcg_out_movi (s, TCG_TYPE_I32, args[0], args[1]);
> break;
> @@ -1575,7 +1566,6 @@ static const TCGTargetOpDef ppc_op_defs[] = {
> { INDEX_op_exit_tb, { } },
> { INDEX_op_goto_tb, { } },
> { INDEX_op_call, { "ri" } },
> - { INDEX_op_jmp, { "ri" } },
> { INDEX_op_br, { } },
>
> { INDEX_op_mov_i32, { "r", "r" } },
> diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
> index 620c666..e119166 100644
> --- a/tcg/sparc/tcg-target.c
> +++ b/tcg/sparc/tcg-target.c
> @@ -1169,7 +1169,6 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
> TCG_TARGET_CALL_STACK_OFFSET - TCG_STATIC_CALL_ARGS_SIZE -
> sizeof(long), HOST_LD_OP);
> break;
> - case INDEX_op_jmp:
> case INDEX_op_br:
> tcg_out_branch_i32(s, COND_A, args[0]);
> tcg_out_nop(s);
> @@ -1431,7 +1430,6 @@ static const TCGTargetOpDef sparc_op_defs[] = {
> { INDEX_op_exit_tb, { } },
> { INDEX_op_goto_tb, { } },
> { INDEX_op_call, { "ri" } },
> - { INDEX_op_jmp, { "ri" } },
> { INDEX_op_br, { } },
>
> { INDEX_op_mov_i32, { "r", "r" } },
> diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h
> index 01fea1e..2682bd7 100644
> --- a/tcg/tcg-opc.h
> +++ b/tcg/tcg-opc.h
> @@ -37,7 +37,6 @@ DEF2(discard, 1, 0, 0, 0)
>
> DEF2(set_label, 0, 0, 1, 0)
> DEF2(call, 0, 1, 2, TCG_OPF_SIDE_EFFECTS) /* variable number of parameters */
> -DEF2(jmp, 0, 1, 0, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)
> DEF2(br, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)
>
> DEF2(mov_i32, 1, 1, 0, 0)
> diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c
> index ea313fa..b1f2c12 100644
> --- a/tcg/x86_64/tcg-target.c
> +++ b/tcg/x86_64/tcg-target.c
> @@ -935,13 +935,6 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
> tcg_out_modrm(s, 0xff, 2, args[0]);
> }
> break;
> - case INDEX_op_jmp:
> - if (const_args[0]) {
> - tcg_out_goto(s, 0, (void *) args[0]);
> - } else {
> - tcg_out_modrm(s, 0xff, 4, args[0]);
> - }
> - break;
> case INDEX_op_br:
> tcg_out_jxx(s, JCC_JMP, args[0]);
> break;
> @@ -1320,7 +1313,6 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
> { INDEX_op_exit_tb, { } },
> { INDEX_op_goto_tb, { } },
> { INDEX_op_call, { "ri" } }, /* XXX: might need a specific constant constraint */
> - { INDEX_op_jmp, { "ri" } }, /* XXX: might need a specific constant constraint */
> { INDEX_op_br, { } },
>
> { INDEX_op_mov_i32, { "r", "r" } },
> --
> 1.6.6.1
>
>
>
>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2010-03-26 21:30 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-19 20:10 [Qemu-devel] [PATCH 0/9] tcg cleanups Richard Henderson
2010-03-19 17:40 ` [Qemu-devel] [PATCH 1/9] tcg: Remove jmp opcode Richard Henderson
2010-03-26 21:30 ` Aurelien Jarno [this message]
2010-03-19 18:12 ` [Qemu-devel] [PATCH 2/9] tcg: Name the opcode enumeration Richard Henderson
2010-03-19 18:26 ` [Qemu-devel] [PATCH 3/9] tcg: Use TCGCond where appropriate Richard Henderson
2010-03-19 18:36 ` [Qemu-devel] [PATCH 4/9] tcg: Change TCGType to an enumeration Richard Henderson
2010-03-19 19:00 ` [Qemu-devel] [PATCH 5/9] tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs Richard Henderson
2010-03-19 19:44 ` [Qemu-devel] [PATCH 6/9] tcg: Use not_i32 to implement not_i64 Richard Henderson
2010-03-19 20:02 ` [Qemu-devel] [PATCH 7/9] tcg: Allow target-specific implementation of EQV Richard Henderson
2010-03-19 20:03 ` [Qemu-devel] [PATCH 8/9] tcg: Allow target-specific implementation of NAND Richard Henderson
2010-03-19 20:08 ` [Qemu-devel] [PATCH 9/9] tcg: Allow target-specific implementation of NOR Richard Henderson
2010-03-26 22:11 ` [Qemu-devel] [PATCH 0/9] tcg cleanups Aurelien Jarno
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