From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: Wu Zhangjin <wuzhangjin@gmail.com>,
David Daney <ddaney@caviumnetworks.com>,
linux-mips@linux-mips.org
Subject: Re: [PATCH] MIPS: Calculate proper ebase value for 64-bit kernels
Date: Tue, 13 Apr 2010 20:15:17 +0200 [thread overview]
Message-ID: <20100413181516.GA19223@alpha.franken.de> (raw)
In-Reply-To: <20100413171610.GA16578@linux-mips.org>
On Tue, Apr 13, 2010 at 06:16:10PM +0100, Ralf Baechle wrote:
> C0_ebase's design was a short-sigthed only considering 32-bit processors.
> So the exception base is in CKSEG0 on every 64-bit processor, be it R2 or
> older. So yes, there is a bug as I've verified by testing but the patch
> is unfortunately incorrect.
well not quite every 64bit CPU, R8k is as always special. R8k has
a trap vector register. But since support for R8k is still lacking
no problem for now.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea. [ RFC1925, 2.3 ]
next prev parent reply other threads:[~2010-04-13 18:15 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-04-06 20:29 [PATCH] MIPS: Calculate proper ebase value for 64-bit kernels David Daney
2010-04-07 15:39 ` Ralf Baechle
2010-04-13 5:03 ` Wu Zhangjin
2010-04-13 7:34 ` Thomas Bogendoerfer
2010-04-13 17:16 ` Ralf Baechle
2010-04-13 18:15 ` Thomas Bogendoerfer [this message]
2010-04-14 8:03 ` Wu Zhangjin
2010-04-14 11:24 ` Thomas Bogendoerfer
2010-04-26 12:13 ` Wu Zhangjin
2010-04-26 17:19 ` David Daney
2010-04-27 2:53 ` Wu Zhangjin
2010-04-27 23:06 ` Maciej W. Rozycki
[not found] <Pine.LNX.4.21.1004270049440.1248-100000@Mobile0.Peter>
2010-04-27 0:22 ` David Daney
2010-04-27 4:05 ` Wu Zhangjin
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