From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1OBORD-0004P4-PD for qemu-devel@nongnu.org; Mon, 10 May 2010 04:34:07 -0400 Received: from [140.186.70.92] (port=39473 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OBOQn-0004kD-IY for qemu-devel@nongnu.org; Mon, 10 May 2010 04:34:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OBO5M-0002hJ-Na for qemu-devel@nongnu.org; Mon, 10 May 2010 04:15:16 -0400 Received: from va3ehsobe005.messaging.microsoft.com ([216.32.180.15]:42545 helo=VA3EHSOBE006.bigfish.com) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OBO5M-0002gA-CW for qemu-devel@nongnu.org; Mon, 10 May 2010 04:11:32 -0400 From: Christoph Egger Subject: Re: [Qemu-devel] AHCI support integration Date: Mon, 10 May 2010 10:10:58 +0200 References: <1945C1D2D39F43239CFD537CA66DA5F8@FSCPC> In-Reply-To: <1945C1D2D39F43239CFD537CA66DA5F8@FSCPC> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-ID: <201005101011.00620.Christoph.Egger@amd.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?utf-8?q?=E4=B9=94=E5=B4=87?= , Joerg Roedel , Elek Roland , Alexander Graf , Sebastian Herbszt On Sunday 09 May 2010 18:01:50 Sebastian Herbszt wrote: > The ICH6 AHCI implementation submitted by Chong is an all-in-one attempt > (ahci.c). It includes all needed parts of the ICH6, AHCI, SATA and ATA > specification. The code in hw/ide/* on the other hand is split (or could be > split) into smaller parts like port based and bus master access, IDE and > ATA core. > I think it might be reasonable to split ahci.c into ICH6, AHCI and SATA > parts and strip the limited ATA support and reuse it from the ide core. > This would give us something like the following: > > hw/ide/piix.c (PIIX3 and PIIX4) > hw/ide/pci.c and core.c (IDE, BM) > hw/ata-core.c (ATA) > hw/sata/ich6.c (ICH6) > hw/sata-core.c (SATA) > hw/ahci-core.c (AHCI) > > Should this be a goal or am i over-engineering here? I think this will result in code much easier to read and to maintain. You can even split out FIS code into a seperate file since not every SATA controller is an AHCI controller. Christoph -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Andrew Bowd, Thomas M. McCoy, Giuliano Meroni Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632