diff for duplicates of <20100517044811.GT26401@trinity.fluff.org> diff --git a/a/1.txt b/N1/1.txt index bb84bad..270bf08 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -9,27 +9,27 @@ On Mon, May 17, 2010 at 12:21:25PM +0900, Kyungmin Park wrote: > >> Signed-off-by: Pannaga Bhushan <p.bhushan@samsung.com> > >> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> > >> --- -> >> arch/arm/mach-s5pv210/Kconfig | 1 + -> >> arch/arm/mach-s5pv210/include/mach/irqs.h | 31 ++-- -> >> arch/arm/mach-s5pv210/include/mach/regs-gpio.h | 46 +++++ -> >> arch/arm/plat-s5p/Kconfig | 5 + -> >> arch/arm/plat-s5p/Makefile | 1 + -> >> arch/arm/plat-s5p/irq-eint.c | 216 ++++++++++++++++++++++++ -> >> 6 files changed, 282 insertions(+), 18 deletions(-) -> >> create mode 100644 arch/arm/mach-s5pv210/include/mach/regs-gpio.h -> >> create mode 100644 arch/arm/plat-s5p/irq-eint.c +> >> ?arch/arm/mach-s5pv210/Kconfig ? ? ? ? ? ? ? ? ?| ? ?1 + +> >> ?arch/arm/mach-s5pv210/include/mach/irqs.h ? ? ?| ? 31 ++-- +> >> ?arch/arm/mach-s5pv210/include/mach/regs-gpio.h | ? 46 +++++ +> >> ?arch/arm/plat-s5p/Kconfig ? ? ? ? ? ? ? ? ? ? ?| ? ?5 + +> >> ?arch/arm/plat-s5p/Makefile ? ? ? ? ? ? ? ? ? ? | ? ?1 + +> >> ?arch/arm/plat-s5p/irq-eint.c ? ? ? ? ? ? ? ? ? | ?216 ++++++++++++++++++++++++ +> >> ?6 files changed, 282 insertions(+), 18 deletions(-) +> >> ?create mode 100644 arch/arm/mach-s5pv210/include/mach/regs-gpio.h +> >> ?create mode 100644 arch/arm/plat-s5p/irq-eint.c > >> > >> diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig > >> index af33a1a..c4c2a7f 100644 > >> --- a/arch/arm/mach-s5pv210/Kconfig > >> +++ b/arch/arm/mach-s5pv210/Kconfig > >> @@ -12,6 +12,7 @@ if ARCH_S5PV210 -> >> config CPU_S5PV210 -> >> bool -> >> select PLAT_S5P -> >> + select S5P_EXT_INT -> >> help -> >> Enable S5PV210 CPU support +> >> ?config CPU_S5PV210 +> >> ? ? ? bool +> >> ? ? ? select PLAT_S5P +> >> + ? ? select S5P_EXT_INT +> >> ? ? ? help +> >> ? ? ? ? Enable S5PV210 CPU support > >> > >> diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h > >> index 62c5175..42b9b28 100644 @@ -37,26 +37,26 @@ On Mon, May 17, 2010 at 12:21:25PM +0900, Kyungmin Park wrote: > >> +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h > >> @@ -17,22 +17,9 @@ > >> -> >> /* VIC0: System, DMA, Timer */ +> >> ?/* VIC0: System, DMA, Timer */ > >> -> >> -#define IRQ_EINT0 S5P_IRQ_VIC0(0) -> >> -#define IRQ_EINT1 S5P_IRQ_VIC0(1) -> >> -#define IRQ_EINT2 S5P_IRQ_VIC0(2) -> >> -#define IRQ_EINT3 S5P_IRQ_VIC0(3) -> >> -#define IRQ_EINT4 S5P_IRQ_VIC0(4) -> >> -#define IRQ_EINT5 S5P_IRQ_VIC0(5) -> >> -#define IRQ_EINT6 S5P_IRQ_VIC0(6) -> >> -#define IRQ_EINT7 S5P_IRQ_VIC0(7) -> >> -#define IRQ_EINT8 S5P_IRQ_VIC0(8) -> >> -#define IRQ_EINT9 S5P_IRQ_VIC0(9) -> >> -#define IRQ_EINT10 S5P_IRQ_VIC0(10) -> >> -#define IRQ_EINT11 S5P_IRQ_VIC0(11) -> >> -#define IRQ_EINT12 S5P_IRQ_VIC0(12) -> >> -#define IRQ_EINT13 S5P_IRQ_VIC0(13) -> >> -#define IRQ_EINT14 S5P_IRQ_VIC0(14) -> >> -#define IRQ_EINT15 S5P_IRQ_VIC0(15) +> >> -#define IRQ_EINT0 ? ? ? ? ? ?S5P_IRQ_VIC0(0) +> >> -#define IRQ_EINT1 ? ? ? ? ? ?S5P_IRQ_VIC0(1) +> >> -#define IRQ_EINT2 ? ? ? ? ? ?S5P_IRQ_VIC0(2) +> >> -#define IRQ_EINT3 ? ? ? ? ? ?S5P_IRQ_VIC0(3) +> >> -#define IRQ_EINT4 ? ? ? ? ? ?S5P_IRQ_VIC0(4) +> >> -#define IRQ_EINT5 ? ? ? ? ? ?S5P_IRQ_VIC0(5) +> >> -#define IRQ_EINT6 ? ? ? ? ? ?S5P_IRQ_VIC0(6) +> >> -#define IRQ_EINT7 ? ? ? ? ? ?S5P_IRQ_VIC0(7) +> >> -#define IRQ_EINT8 ? ? ? ? ? ?S5P_IRQ_VIC0(8) +> >> -#define IRQ_EINT9 ? ? ? ? ? ?S5P_IRQ_VIC0(9) +> >> -#define IRQ_EINT10 ? ? ? ? ? S5P_IRQ_VIC0(10) +> >> -#define IRQ_EINT11 ? ? ? ? ? S5P_IRQ_VIC0(11) +> >> -#define IRQ_EINT12 ? ? ? ? ? S5P_IRQ_VIC0(12) +> >> -#define IRQ_EINT13 ? ? ? ? ? S5P_IRQ_VIC0(13) +> >> -#define IRQ_EINT14 ? ? ? ? ? S5P_IRQ_VIC0(14) +> >> -#define IRQ_EINT15 ? ? ? ? ? S5P_IRQ_VIC0(15) > >> +/* Can be used for EINTs 0 to 15 */ -> >> +#define IRQ_EINT(x) ((x) + S5P_IRQ_VIC0(0)) +> >> +#define IRQ_EINT(x) ? ? ? ? ?((x) + S5P_IRQ_VIC0(0)) > >> + > > It should be consider the higher interrupt number. As your comment @@ -76,32 +76,32 @@ cases of 'x'. > Thank you, > Kyungmin Park > -> >> #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) -> >> #define IRQ_BATF S5P_IRQ_VIC0(17) -> >> #define IRQ_MDMA S5P_IRQ_VIC0(18) +> >> ?#define IRQ_EINT16_31 ? ? ? ? ? ? ? ?S5P_IRQ_VIC0(16) +> >> ?#define IRQ_BATF ? ? ? ? ? ? S5P_IRQ_VIC0(17) +> >> ?#define IRQ_MDMA ? ? ? ? ? ? S5P_IRQ_VIC0(18) > >> @@ -137,10 +124,18 @@ -> >> #define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) +> >> ?#define S5P_IRQ_EINT_BASE ? ?(IRQ_VIC_END + 1) > >> -> >> #define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) -> >> -#define IRQ_EINT(x) S5P_EINT(x) +> >> ?#define S5P_EINT(x) ? ? ? ? ?((x) + S5P_IRQ_EINT_BASE) +> >> -#define IRQ_EINT(x) ? ? ? ? ?S5P_EINT(x) > >> +/* Can be used for EINTs 16 to 31 */ -> >> +#define IRQ_EINT_GRP(x) S5P_EINT(x) +> >> +#define IRQ_EINT_GRP(x) ? ? ? ? ? ? ?S5P_EINT(x) > >> + -> >> +#define EINT_MODE S3C_GPIO_SFN(0xf) +> >> +#define EINT_MODE ? ? ? ? ? ?S3C_GPIO_SFN(0xf) > >> -> >> /* Set the default NR_IRQS */ +> >> ?/* Set the default NR_IRQS */ > >> -> >> -#define NR_IRQS (IRQ_EINT(31) + 1) -> >> +#define NR_IRQS (IRQ_EINT_GRP(31) + 1) +> >> -#define NR_IRQS ? ? ? ? ? ? ?(IRQ_EINT(31) + 1) +> >> +#define NR_IRQS ? ? ? ? ? ? ? ? ? ? ?(IRQ_EINT_GRP(31) + 1) > >> + -> >> +#define EINT_GPIO_REG0(x) S5PV210_GPH0(x) -> >> +#define EINT_GPIO_REG1(x) S5PV210_GPH1(x) -> >> +#define EINT_GPIO_REG2(x) S5PV210_GPH2(x) -> >> +#define EINT_GPIO_REG3(x) S5PV210_GPH3(x) +> >> +#define EINT_GPIO_REG0(x) ? ?S5PV210_GPH0(x) +> >> +#define EINT_GPIO_REG1(x) ? ?S5PV210_GPH1(x) +> >> +#define EINT_GPIO_REG2(x) ? ?S5PV210_GPH2(x) +> >> +#define EINT_GPIO_REG3(x) ? ?S5PV210_GPH3(x) i think _REG shoiuld be removed from here, it isn't a register as such. -> >> #endif /* ASM_ARCH_IRQS_H */ +> >> ?#endif /* ASM_ARCH_IRQS_H */ > >> diff --git a/arch/arm/mach-s5pv210/include/mach/regs-gpio.h b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h > >> new file mode 100644 > >> index 0000000..fe16292 @@ -111,7 +111,7 @@ i think _REG shoiuld be removed from here, it isn't a register as such. > >> +/* linux/arch/arm/mach-s5pv210/include/mach/regs-gpio.h > >> + * > >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd. -> >> + * http://www.samsung.com +> >> + * ? ? ? ? ? http://www.samsung.com > >> + * > >> + * S5PV210 - GPIO (including EINT) register definitions > >> + * @@ -125,299 +125,21 @@ i think _REG shoiuld be removed from here, it isn't a register as such. > >> + > >> +#include <mach/map.h> > >> + -> >> +#define S5PV210_EINT30CON (S5P_VA_GPIO + 0xE00) -> >> +#define S5P_EINT_CON(x) (S5PV210_EINT30CON + ((x) * 0x4)) +> >> +#define S5PV210_EINT30CON ? ? ? ? ? ?(S5P_VA_GPIO + 0xE00) +> >> +#define S5P_EINT_CON(x) ? ? ? ? ? ? ? ? ? ? ?(S5PV210_EINT30CON + ((x) * 0x4)) > >> + -> >> +#define S5PV210_EINT30FLTCON0 (S5P_VA_GPIO + 0xE80) -> >> +#define S5P_EINT_FLTCON(x) (S5PV210_EINT30FLTCON0 + ((x) * 0x4)) +> >> +#define S5PV210_EINT30FLTCON0 ? ? ? ? ? ? ? ?(S5P_VA_GPIO + 0xE80) +> >> +#define S5P_EINT_FLTCON(x) ? ? ? ? ? (S5PV210_EINT30FLTCON0 + ((x) * 0x4)) > >> + -> >> +#define S5PV210_EINT30MASK (S5P_VA_GPIO + 0xF00) -> >> +#define S5P_EINT_MASK(x) (S5PV210_EINT30MASK + ((x) * 0x4)) +> >> +#define S5PV210_EINT30MASK ? ? ? ? ? (S5P_VA_GPIO + 0xF00) +> >> +#define S5P_EINT_MASK(x) ? ? ? ? ? ? (S5PV210_EINT30MASK + ((x) * 0x4)) > >> + -> >> +#define S5PV210_EINT30PEND (S5P_VA_GPIO + 0xF40) -> >> +#define S5P_EINT_PEND(x) (S5PV210_EINT30PEND + ((x) * 0x4)) +> >> +#define S5PV210_EINT30PEND ? ? ? ? ? (S5P_VA_GPIO + 0xF40) +> >> +#define S5P_EINT_PEND(x) ? ? ? ? ? ? (S5PV210_EINT30PEND + ((x) * 0x4)) > >> + -> >> +#define eint_offset(irq) ((irq) < IRQ_EINT16_31 ? ((irq) - IRQ_EINT(0)) \ -> >> + : ((irq) - S5P_IRQ_EINT_BASE)) +> >> +#define eint_offset(irq) ? ? ((irq) < IRQ_EINT16_31 ? ((irq) - IRQ_EINT(0)) \ +> >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? : ((irq) - S5P_IRQ_EINT_BASE)) > >> + > > > > should we sepreate out the EINT 0..15 cases to make the higher EINT > > code easier to process? - -From a quick talk with Bhuhsan, it seems that this isn't the case. We can -leave this comment for now. - -> >> +#define eint_irq_to_bit(irq) (1 << (eint_offset(irq) & 0x7)) -> >> + -> >> +#define eint_conf_reg(irq) ((eint_offset(irq)) >> 3) -> >> +#define eint_mask_reg(irq) ((eint_offset(irq)) >> 3) -> >> +#define eint_pend_reg(irq) ((eint_offset(irq)) >> 3) -> >> + -> >> +/* values for S5P_EXTINT0 */ -> >> +#define S5P_EXTINT_LOWLEV (0x00) -> >> +#define S5P_EXTINT_HILEV (0x01) -> >> +#define S5P_EXTINT_FALLEDGE (0x02) -> >> +#define S5P_EXTINT_RISEEDGE (0x03) -> >> +#define S5P_EXTINT_BOTHEDGE (0x04) -> >> + -> >> +#endif /* __ASM_ARCH_REGS_GPIO_H */ -> >> diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig -> >> index d400a6a..7d1fc40 100644 -> >> --- a/arch/arm/plat-s5p/Kconfig -> >> +++ b/arch/arm/plat-s5p/Kconfig -> >> @@ -23,3 +23,8 @@ config PLAT_S5P -> >> select SAMSUNG_IRQ_UART -> >> help -> >> Base platform code for Samsung's S5P series SoC. -> >> + -> >> +config S5P_EXT_INT -> >> + bool -> >> + help -> >> + Use the external interrupts (other than GPIO interrupts.) -> >> diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile -> >> index a7c54b3..25941a5 100644 -> >> --- a/arch/arm/plat-s5p/Makefile -> >> +++ b/arch/arm/plat-s5p/Makefile -> >> @@ -16,4 +16,5 @@ obj-y += dev-uart.o -> >> obj-y += cpu.o -> >> obj-y += clock.o -> >> obj-y += irq.o -> >> +obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o -> >> obj-y += setup-i2c0.o -> >> diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c -> >> new file mode 100644 -> >> index 0000000..484a8fe -> >> --- /dev/null -> >> +++ b/arch/arm/plat-s5p/irq-eint.c -> >> @@ -0,0 +1,216 @@ -> >> +/* linux/arch/arm/plat-s5p/irq-eint.c -> >> + * -> >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd. -> >> + * http://www.samsung.com -> >> + * -> >> + * S5P - IRQ EINT support -> >> + * -> >> + * This program is free software; you can redistribute it and/or modify -> >> + * it under the terms of the GNU General Public License version 2 as -> >> + * published by the Free Software Foundation. -> >> +*/ -> >> + -> >> +#include <linux/kernel.h> -> >> +#include <linux/interrupt.h> -> >> +#include <linux/irq.h> -> >> +#include <linux/io.h> -> >> +#include <linux/sysdev.h> -> >> +#include <linux/gpio.h> -> >> + -> >> +#include <asm/bitops.h> -> >> +#include <asm/hardware/vic.h> -> >> + -> >> +#include <plat/regs-irqtype.h> -> >> + -> >> +#include <mach/map.h> -> >> +#include <plat/cpu.h> -> >> +#include <plat/pm.h> -> >> + -> >> +#include <plat/gpio-cfg.h> -> >> +#include <mach/regs-gpio.h> -> >> + -> >> +static inline void s5p_irq_eint_mask(unsigned int irq) -> >> +{ -> >> + u32 mask; -> >> + -> >> + mask = __raw_readl(S5P_EINT_MASK(eint_mask_reg(irq))); -> >> + mask |= eint_irq_to_bit(irq); -> >> + __raw_writel(mask, S5P_EINT_MASK(eint_mask_reg(irq))); -> >> +} -> >> + -> >> +static void s5p_irq_eint_unmask(unsigned int irq) -> >> +{ -> >> + u32 mask; -> >> + -> >> + mask = __raw_readl(S5P_EINT_MASK(eint_mask_reg(irq))); -> >> + mask &= ~(eint_irq_to_bit(irq)); -> >> + __raw_writel(mask, S5P_EINT_MASK(eint_mask_reg(irq))); -> >> +} -> >> + -> >> +static inline void s5p_irq_eint_ack(unsigned int irq) -> >> +{ -> >> + __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(eint_pend_reg(irq))); -> >> +} -> >> + -> >> +static void s5p_irq_eint_maskack(unsigned int irq) -> >> +{ -> >> + /* compiler should in-line these */ -> >> + s5p_irq_eint_mask(irq); -> >> + s5p_irq_eint_ack(irq); -> >> +} -> >> + -> >> +static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type) -> >> +{ -> >> + int offs = eint_offset(irq); -> >> + int shift; -> >> + u32 ctrl, mask; -> >> + u32 newvalue = 0; -> >> + -> >> + switch (type) { -> >> + case IRQ_TYPE_NONE: -> >> + printk(KERN_WARNING "No edge setting!\n"); -> >> + break; -> >> + -> >> + case IRQ_TYPE_EDGE_RISING: -> >> + newvalue = S5P_EXTINT_RISEEDGE; -> >> + break; -> >> + -> >> + case IRQ_TYPE_EDGE_FALLING: -> >> + newvalue = S5P_EXTINT_RISEEDGE; -> >> + break; -> >> + -> >> + case IRQ_TYPE_EDGE_BOTH: -> >> + newvalue = S5P_EXTINT_BOTHEDGE; -> >> + break; -> >> + -> >> + case IRQ_TYPE_LEVEL_LOW: -> >> + newvalue = S5P_EXTINT_LOWLEV; -> >> + break; -> >> + -> >> + case IRQ_TYPE_LEVEL_HIGH: -> >> + newvalue = S5P_EXTINT_HILEV; -> >> + break; -> >> + -> >> + default: -> >> + printk(KERN_ERR "No such irq type %d", type); -> >> + return -EINVAL; -> >> + } -> >> + -> >> + shift = (offs & 0x7) * 4; -> >> + mask = 0x7 << shift; -> >> + -> >> + ctrl = __raw_readl(S5P_EINT_CON(eint_conf_reg(irq))); -> >> + ctrl &= ~mask; -> >> + ctrl |= newvalue << shift; -> >> + __raw_writel(ctrl, S5P_EINT_CON(eint_conf_reg(irq))); -> >> + -> >> + if ((0 <= offs) && (offs < 8)) -> >> + s3c_gpio_cfgpin(EINT_GPIO_REG0(offs & 0x7), EINT_MODE); -> >> + -> >> + else if ((8 <= offs) && (offs < 16)) -> >> + s3c_gpio_cfgpin(EINT_GPIO_REG1(offs & 0x7), EINT_MODE); -> >> + -> >> + else if ((16 <= offs) && (offs < 24)) -> >> + s3c_gpio_cfgpin(EINT_GPIO_REG2(offs & 0x7), EINT_MODE); -> >> + -> >> + else if ((24 <= offs) && (offs < 32)) -> >> + s3c_gpio_cfgpin(EINT_GPIO_REG3(offs & 0x7), EINT_MODE); -> >> + -> >> + else -> >> + printk(KERN_ERR "No such irq number %d", offs); -> >> + -> >> + return 0; -> >> +} -> >> + -> >> +static struct irq_chip s5p_irq_eint = { -> >> + .name = "s5p-eint", -> >> + .mask = s5p_irq_eint_mask, -> >> + .unmask = s5p_irq_eint_unmask, -> >> + .mask_ack = s5p_irq_eint_maskack, -> >> + .ack = s5p_irq_eint_ack, -> >> + .set_type = s5p_irq_eint_set_type, -> >> +#ifdef CONFIG_PM -> >> + .set_wake = s3c_irqext_wake, -> >> +#endif -> >> +}; -> >> + -> >> +/* s5p_irq_demux_eint -> >> + * -> >> + * This function demuxes the IRQ from the group0 external interrupts, -> >> + * from IRQ_EINT(16) to IRQ_EINT(31). It is designed to be inlined into -> >> + * the specific handlers s5p_irq_demux_eintX_Y. -> >> + */ -> >> +static inline void s5p_irq_demux_eint(unsigned int start, unsigned int end) -> >> +{ -> >> + u32 status; -> >> + u32 mask = __raw_readl(S5P_EINT_MASK((start >> 3))); -> >> + unsigned int irq; -> >> + -> >> + status = __raw_readl(S5P_EINT_PEND((start >> 3))); -> >> + status &= ~mask; -> >> + status &= (1 << (end - start + 1)) - 1; -> > -> > We don't need to do any masking here as we'll always be processing all -> > interrupts from the controller. In fact, we probably don't need the end -> > argument here at-all. -> > -> >> + while (status) { -> >> + irq = fls(status); -> >> + generic_handle_irq(irq - 1 + IRQ_EINT(start)); -> >> + status &= ~(1 << irq); -> >> + } -> >> +} -> >> + -> >> +static void s5p_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) -> >> +{ -> >> + s5p_irq_demux_eint(16, 23); -> >> + s5p_irq_demux_eint(24, 31); - -We can remove the end parameters, both interrupt banks are 8 IRQs and -this we can also make the bit clearing post mask a constant if it is -even needed. - -> >> +} -> >> + -> >> +static inline void s5p_irq_vic_eint_mask(unsigned int irq) -> >> +{ -> >> + s5p_irq_eint_mask(irq); -> >> +} -> >> + -> >> +static void s5p_irq_vic_eint_unmask(unsigned int irq) -> >> +{ -> >> + s5p_irq_eint_unmask(irq); -> >> +} -> >> + -> >> +static inline void s5p_irq_vic_eint_ack(unsigned int irq) -> >> +{ -> >> + __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(eint_pend_reg(irq))); -> >> +} -> >> + -> >> +static void s5p_irq_vic_eint_maskack(unsigned int irq) -> >> +{ -> >> + s5p_irq_vic_eint_mask(irq); -> >> + s5p_irq_vic_eint_ack(irq); -> >> +} -> >> + -> >> +static struct irq_chip s5p_irq_vic_eint = { -> >> + .name = "s5p_vic_eint", -> >> + .mask = s5p_irq_vic_eint_mask, -> >> + .unmask = s5p_irq_vic_eint_unmask, -> >> + .mask_ack = s5p_irq_vic_eint_maskack, -> >> + .ack = s5p_irq_vic_eint_ack, -> >> + .set_type = s5p_irq_eint_set_type, -> >> +#ifdef CONFIG_PM -> >> + .set_wake = s3c_irqext_wake, -> >> +#endif -> >> +}; -> >> + -> >> +int __init s5p_init_irq_eint(void) -> >> +{ -> >> + int irq; -> >> + -> >> + for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++) -> >> + set_irq_chip(irq, &s5p_irq_vic_eint); -> >> + -> >> + for (irq = IRQ_EINT_GRP(16); irq <= IRQ_EINT_GRP(31); irq++) { -> >> + set_irq_chip(irq, &s5p_irq_eint); -> >> + set_irq_handler(irq, handle_level_irq); -> >> + set_irq_flags(irq, IRQF_VALID); -> >> + } -> >> + -> >> + set_irq_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31); -> >> + return 0; -> >> +} -> >> + -> >> +arch_initcall(s5p_init_irq_eint); - --- -Ben - -Q: What's a light-year? -A: One-third less calories than a regular year. diff --git a/a/content_digest b/N1/content_digest index 116f6a5..03c79ed 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,16 +1,10 @@ "ref\01274059016-24700-1-git-send-email-kgene.kim@samsung.com\0" "ref\020100517022209.GS26401@trinity.fluff.org\0" "ref\0AANLkTilijYxXm-vXTG3iL11Z_INXAebGQdh02EdmOboE@mail.gmail.com\0" - "From\0Ben Dooks <ben-linux@fluff.org>\0" - "Subject\0Re: [PATCH v5] ARM: S5PV210: Add Ext interrupt support.\0" + "From\0ben-linux@fluff.org (Ben Dooks)\0" + "Subject\0[PATCH v5] ARM: S5PV210: Add Ext interrupt support.\0" "Date\0Mon, 17 May 2010 05:48:11 +0100\0" - "To\0Kyungmin Park <kmpark@infradead.org>\0" - "Cc\0Ben Dooks <ben-linux@fluff.org>" - Kukjin Kim <kgene.kim@samsung.com> - linux-arm-kernel@lists.infradead.org - linux-samsung-soc@vger.kernel.org - Jongpill Lee <boyko.lee@samsung.com> - " Pannaga Bhushan <p.bhushan@samsung.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Mon, May 17, 2010 at 12:21:25PM +0900, Kyungmin Park wrote:\n" @@ -24,27 +18,27 @@ "> >> Signed-off-by: Pannaga Bhushan <p.bhushan@samsung.com>\n" "> >> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>\n" "> >> ---\n" - "> >> \302\240arch/arm/mach-s5pv210/Kconfig \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240| \302\240 \302\2401 +\n" - "> >> \302\240arch/arm/mach-s5pv210/include/mach/irqs.h \302\240 \302\240 \302\240| \302\240 31 ++--\n" - "> >> \302\240arch/arm/mach-s5pv210/include/mach/regs-gpio.h | \302\240 46 +++++\n" - "> >> \302\240arch/arm/plat-s5p/Kconfig \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240| \302\240 \302\2405 +\n" - "> >> \302\240arch/arm/plat-s5p/Makefile \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 | \302\240 \302\2401 +\n" - "> >> \302\240arch/arm/plat-s5p/irq-eint.c \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 | \302\240216 ++++++++++++++++++++++++\n" - "> >> \302\2406 files changed, 282 insertions(+), 18 deletions(-)\n" - "> >> \302\240create mode 100644 arch/arm/mach-s5pv210/include/mach/regs-gpio.h\n" - "> >> \302\240create mode 100644 arch/arm/plat-s5p/irq-eint.c\n" + "> >> ?arch/arm/mach-s5pv210/Kconfig ? ? ? ? ? ? ? ? ?| ? ?1 +\n" + "> >> ?arch/arm/mach-s5pv210/include/mach/irqs.h ? ? ?| ? 31 ++--\n" + "> >> ?arch/arm/mach-s5pv210/include/mach/regs-gpio.h | ? 46 +++++\n" + "> >> ?arch/arm/plat-s5p/Kconfig ? ? ? ? ? ? ? ? ? ? ?| ? ?5 +\n" + "> >> ?arch/arm/plat-s5p/Makefile ? ? ? ? ? ? ? ? ? ? | ? ?1 +\n" + "> >> ?arch/arm/plat-s5p/irq-eint.c ? ? ? ? ? ? ? ? ? | ?216 ++++++++++++++++++++++++\n" + "> >> ?6 files changed, 282 insertions(+), 18 deletions(-)\n" + "> >> ?create mode 100644 arch/arm/mach-s5pv210/include/mach/regs-gpio.h\n" + "> >> ?create mode 100644 arch/arm/plat-s5p/irq-eint.c\n" "> >>\n" "> >> diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig\n" "> >> index af33a1a..c4c2a7f 100644\n" "> >> --- a/arch/arm/mach-s5pv210/Kconfig\n" "> >> +++ b/arch/arm/mach-s5pv210/Kconfig\n" "> >> @@ -12,6 +12,7 @@ if ARCH_S5PV210\n" - "> >> \302\240config CPU_S5PV210\n" - "> >> \302\240 \302\240 \302\240 bool\n" - "> >> \302\240 \302\240 \302\240 select PLAT_S5P\n" - "> >> + \302\240 \302\240 select S5P_EXT_INT\n" - "> >> \302\240 \302\240 \302\240 help\n" - "> >> \302\240 \302\240 \302\240 \302\240 Enable S5PV210 CPU support\n" + "> >> ?config CPU_S5PV210\n" + "> >> ? ? ? bool\n" + "> >> ? ? ? select PLAT_S5P\n" + "> >> + ? ? select S5P_EXT_INT\n" + "> >> ? ? ? help\n" + "> >> ? ? ? ? Enable S5PV210 CPU support\n" "> >>\n" "> >> diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h\n" "> >> index 62c5175..42b9b28 100644\n" @@ -52,26 +46,26 @@ "> >> +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h\n" "> >> @@ -17,22 +17,9 @@\n" "> >>\n" - "> >> \302\240/* VIC0: System, DMA, Timer */\n" + "> >> ?/* VIC0: System, DMA, Timer */\n" "> >>\n" - "> >> -#define IRQ_EINT0 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_IRQ_VIC0(0)\n" - "> >> -#define IRQ_EINT1 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_IRQ_VIC0(1)\n" - "> >> -#define IRQ_EINT2 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_IRQ_VIC0(2)\n" - "> >> -#define IRQ_EINT3 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_IRQ_VIC0(3)\n" - "> >> -#define IRQ_EINT4 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_IRQ_VIC0(4)\n" - "> >> -#define IRQ_EINT5 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_IRQ_VIC0(5)\n" - "> >> -#define IRQ_EINT6 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_IRQ_VIC0(6)\n" - "> >> -#define IRQ_EINT7 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_IRQ_VIC0(7)\n" - "> >> -#define IRQ_EINT8 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_IRQ_VIC0(8)\n" - "> >> -#define IRQ_EINT9 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_IRQ_VIC0(9)\n" - "> >> -#define IRQ_EINT10 \302\240 \302\240 \302\240 \302\240 \302\240 S5P_IRQ_VIC0(10)\n" - "> >> -#define IRQ_EINT11 \302\240 \302\240 \302\240 \302\240 \302\240 S5P_IRQ_VIC0(11)\n" - "> >> -#define IRQ_EINT12 \302\240 \302\240 \302\240 \302\240 \302\240 S5P_IRQ_VIC0(12)\n" - "> >> -#define IRQ_EINT13 \302\240 \302\240 \302\240 \302\240 \302\240 S5P_IRQ_VIC0(13)\n" - "> >> -#define IRQ_EINT14 \302\240 \302\240 \302\240 \302\240 \302\240 S5P_IRQ_VIC0(14)\n" - "> >> -#define IRQ_EINT15 \302\240 \302\240 \302\240 \302\240 \302\240 S5P_IRQ_VIC0(15)\n" + "> >> -#define IRQ_EINT0 ? ? ? ? ? ?S5P_IRQ_VIC0(0)\n" + "> >> -#define IRQ_EINT1 ? ? ? ? ? ?S5P_IRQ_VIC0(1)\n" + "> >> -#define IRQ_EINT2 ? ? ? ? ? ?S5P_IRQ_VIC0(2)\n" + "> >> -#define IRQ_EINT3 ? ? ? ? ? ?S5P_IRQ_VIC0(3)\n" + "> >> -#define IRQ_EINT4 ? ? ? ? ? ?S5P_IRQ_VIC0(4)\n" + "> >> -#define IRQ_EINT5 ? ? ? ? ? ?S5P_IRQ_VIC0(5)\n" + "> >> -#define IRQ_EINT6 ? ? ? ? ? ?S5P_IRQ_VIC0(6)\n" + "> >> -#define IRQ_EINT7 ? ? ? ? ? ?S5P_IRQ_VIC0(7)\n" + "> >> -#define IRQ_EINT8 ? ? ? ? ? ?S5P_IRQ_VIC0(8)\n" + "> >> -#define IRQ_EINT9 ? ? ? ? ? ?S5P_IRQ_VIC0(9)\n" + "> >> -#define IRQ_EINT10 ? ? ? ? ? S5P_IRQ_VIC0(10)\n" + "> >> -#define IRQ_EINT11 ? ? ? ? ? S5P_IRQ_VIC0(11)\n" + "> >> -#define IRQ_EINT12 ? ? ? ? ? S5P_IRQ_VIC0(12)\n" + "> >> -#define IRQ_EINT13 ? ? ? ? ? S5P_IRQ_VIC0(13)\n" + "> >> -#define IRQ_EINT14 ? ? ? ? ? S5P_IRQ_VIC0(14)\n" + "> >> -#define IRQ_EINT15 ? ? ? ? ? S5P_IRQ_VIC0(15)\n" "> >> +/* Can be used for EINTs 0 to 15 */\n" - "> >> +#define IRQ_EINT(x) \302\240 \302\240 \302\240 \302\240 \302\240((x) + S5P_IRQ_VIC0(0))\n" + "> >> +#define IRQ_EINT(x) ? ? ? ? ?((x) + S5P_IRQ_VIC0(0))\n" "> >> +\n" "> \n" "> It should be consider the higher interrupt number. As your comment\n" @@ -91,32 +85,32 @@ "> Thank you,\n" "> Kyungmin Park\n" "> \n" - "> >> \302\240#define IRQ_EINT16_31 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_IRQ_VIC0(16)\n" - "> >> \302\240#define IRQ_BATF \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 S5P_IRQ_VIC0(17)\n" - "> >> \302\240#define IRQ_MDMA \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 S5P_IRQ_VIC0(18)\n" + "> >> ?#define IRQ_EINT16_31 ? ? ? ? ? ? ? ?S5P_IRQ_VIC0(16)\n" + "> >> ?#define IRQ_BATF ? ? ? ? ? ? S5P_IRQ_VIC0(17)\n" + "> >> ?#define IRQ_MDMA ? ? ? ? ? ? S5P_IRQ_VIC0(18)\n" "> >> @@ -137,10 +124,18 @@\n" - "> >> \302\240#define S5P_IRQ_EINT_BASE \302\240 \302\240(IRQ_VIC_END + 1)\n" + "> >> ?#define S5P_IRQ_EINT_BASE ? ?(IRQ_VIC_END + 1)\n" "> >>\n" - "> >> \302\240#define S5P_EINT(x) \302\240 \302\240 \302\240 \302\240 \302\240((x) + S5P_IRQ_EINT_BASE)\n" - "> >> -#define IRQ_EINT(x) \302\240 \302\240 \302\240 \302\240 \302\240S5P_EINT(x)\n" + "> >> ?#define S5P_EINT(x) ? ? ? ? ?((x) + S5P_IRQ_EINT_BASE)\n" + "> >> -#define IRQ_EINT(x) ? ? ? ? ?S5P_EINT(x)\n" "> >> +/* Can be used for EINTs 16 to 31 */\n" - "> >> +#define IRQ_EINT_GRP(x) \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S5P_EINT(x)\n" + "> >> +#define IRQ_EINT_GRP(x) ? ? ? ? ? ? ?S5P_EINT(x)\n" "> >> +\n" - "> >> +#define EINT_MODE \302\240 \302\240 \302\240 \302\240 \302\240 \302\240S3C_GPIO_SFN(0xf)\n" + "> >> +#define EINT_MODE ? ? ? ? ? ?S3C_GPIO_SFN(0xf)\n" "> >>\n" - "> >> \302\240/* Set the default NR_IRQS */\n" + "> >> ?/* Set the default NR_IRQS */\n" "> >>\n" - "> >> -#define NR_IRQS \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(IRQ_EINT(31) + 1)\n" - "> >> +#define NR_IRQS \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(IRQ_EINT_GRP(31) + 1)\n" + "> >> -#define NR_IRQS ? ? ? ? ? ? ?(IRQ_EINT(31) + 1)\n" + "> >> +#define NR_IRQS ? ? ? ? ? ? ? ? ? ? ?(IRQ_EINT_GRP(31) + 1)\n" "> >> +\n" - "> >> +#define EINT_GPIO_REG0(x) \302\240 \302\240S5PV210_GPH0(x)\n" - "> >> +#define EINT_GPIO_REG1(x) \302\240 \302\240S5PV210_GPH1(x)\n" - "> >> +#define EINT_GPIO_REG2(x) \302\240 \302\240S5PV210_GPH2(x)\n" - "> >> +#define EINT_GPIO_REG3(x) \302\240 \302\240S5PV210_GPH3(x)\n" + "> >> +#define EINT_GPIO_REG0(x) ? ?S5PV210_GPH0(x)\n" + "> >> +#define EINT_GPIO_REG1(x) ? ?S5PV210_GPH1(x)\n" + "> >> +#define EINT_GPIO_REG2(x) ? ?S5PV210_GPH2(x)\n" + "> >> +#define EINT_GPIO_REG3(x) ? ?S5PV210_GPH3(x)\n" "\n" "i think _REG shoiuld be removed from here, it isn't a register as such.\n" "\n" - "> >> \302\240#endif /* ASM_ARCH_IRQS_H */\n" + "> >> ?#endif /* ASM_ARCH_IRQS_H */\n" "> >> diff --git a/arch/arm/mach-s5pv210/include/mach/regs-gpio.h b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h\n" "> >> new file mode 100644\n" "> >> index 0000000..fe16292\n" @@ -126,7 +120,7 @@ "> >> +/* linux/arch/arm/mach-s5pv210/include/mach/regs-gpio.h\n" "> >> + *\n" "> >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.\n" - "> >> + * \302\240 \302\240 \302\240 \302\240 \302\240 http://www.samsung.com\n" + "> >> + * ? ? ? ? ? http://www.samsung.com\n" "> >> + *\n" "> >> + * S5PV210 - GPIO (including EINT) register definitions\n" "> >> + *\n" @@ -140,301 +134,23 @@ "> >> +\n" "> >> +#include <mach/map.h>\n" "> >> +\n" - "> >> +#define S5PV210_EINT30CON \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(S5P_VA_GPIO + 0xE00)\n" - "> >> +#define S5P_EINT_CON(x) \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(S5PV210_EINT30CON + ((x) * 0x4))\n" + "> >> +#define S5PV210_EINT30CON ? ? ? ? ? ?(S5P_VA_GPIO + 0xE00)\n" + "> >> +#define S5P_EINT_CON(x) ? ? ? ? ? ? ? ? ? ? ?(S5PV210_EINT30CON + ((x) * 0x4))\n" "> >> +\n" - "> >> +#define S5PV210_EINT30FLTCON0 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(S5P_VA_GPIO + 0xE80)\n" - "> >> +#define S5P_EINT_FLTCON(x) \302\240 \302\240 \302\240 \302\240 \302\240 (S5PV210_EINT30FLTCON0 + ((x) * 0x4))\n" + "> >> +#define S5PV210_EINT30FLTCON0 ? ? ? ? ? ? ? ?(S5P_VA_GPIO + 0xE80)\n" + "> >> +#define S5P_EINT_FLTCON(x) ? ? ? ? ? (S5PV210_EINT30FLTCON0 + ((x) * 0x4))\n" "> >> +\n" - "> >> +#define S5PV210_EINT30MASK \302\240 \302\240 \302\240 \302\240 \302\240 (S5P_VA_GPIO + 0xF00)\n" - "> >> +#define S5P_EINT_MASK(x) \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 (S5PV210_EINT30MASK + ((x) * 0x4))\n" + "> >> +#define S5PV210_EINT30MASK ? ? ? ? ? (S5P_VA_GPIO + 0xF00)\n" + "> >> +#define S5P_EINT_MASK(x) ? ? ? ? ? ? (S5PV210_EINT30MASK + ((x) * 0x4))\n" "> >> +\n" - "> >> +#define S5PV210_EINT30PEND \302\240 \302\240 \302\240 \302\240 \302\240 (S5P_VA_GPIO + 0xF40)\n" - "> >> +#define S5P_EINT_PEND(x) \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 (S5PV210_EINT30PEND + ((x) * 0x4))\n" + "> >> +#define S5PV210_EINT30PEND ? ? ? ? ? (S5P_VA_GPIO + 0xF40)\n" + "> >> +#define S5P_EINT_PEND(x) ? ? ? ? ? ? (S5PV210_EINT30PEND + ((x) * 0x4))\n" "> >> +\n" - "> >> +#define eint_offset(irq) \302\240 \302\240 ((irq) < IRQ_EINT16_31 ? ((irq) - IRQ_EINT(0)) \\\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 : ((irq) - S5P_IRQ_EINT_BASE))\n" + "> >> +#define eint_offset(irq) ? ? ((irq) < IRQ_EINT16_31 ? ((irq) - IRQ_EINT(0)) \\\n" + "> >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? : ((irq) - S5P_IRQ_EINT_BASE))\n" "> >> +\n" "> >\n" "> > should we sepreate out the EINT 0..15 cases to make the higher EINT\n" - "> > code easier to process?\n" - "\n" - "From a quick talk with Bhuhsan, it seems that this isn't the case. We can\n" - "leave this comment for now.\n" - "\n" - "> >> +#define eint_irq_to_bit(irq) \302\240 \302\240 \302\240 \302\240 (1 << (eint_offset(irq) & 0x7))\n" - "> >> +\n" - "> >> +#define eint_conf_reg(irq) \302\240 \302\240 \302\240 \302\240 \302\240 ((eint_offset(irq)) >> 3)\n" - "> >> +#define eint_mask_reg(irq) \302\240 \302\240 \302\240 \302\240 \302\240 ((eint_offset(irq)) >> 3)\n" - "> >> +#define eint_pend_reg(irq) \302\240 \302\240 \302\240 \302\240 \302\240 ((eint_offset(irq)) >> 3)\n" - "> >> +\n" - "> >> +/* values for S5P_EXTINT0 */\n" - "> >> +#define S5P_EXTINT_LOWLEV \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(0x00)\n" - "> >> +#define S5P_EXTINT_HILEV \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 (0x01)\n" - "> >> +#define S5P_EXTINT_FALLEDGE \302\240 \302\240 \302\240 \302\240 \302\240(0x02)\n" - "> >> +#define S5P_EXTINT_RISEEDGE \302\240 \302\240 \302\240 \302\240 \302\240(0x03)\n" - "> >> +#define S5P_EXTINT_BOTHEDGE \302\240 \302\240 \302\240 \302\240 \302\240(0x04)\n" - "> >> +\n" - "> >> +#endif /* __ASM_ARCH_REGS_GPIO_H */\n" - "> >> diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig\n" - "> >> index d400a6a..7d1fc40 100644\n" - "> >> --- a/arch/arm/plat-s5p/Kconfig\n" - "> >> +++ b/arch/arm/plat-s5p/Kconfig\n" - "> >> @@ -23,3 +23,8 @@ config PLAT_S5P\n" - "> >> \302\240 \302\240 \302\240 select SAMSUNG_IRQ_UART\n" - "> >> \302\240 \302\240 \302\240 help\n" - "> >> \302\240 \302\240 \302\240 \302\240 Base platform code for Samsung's S5P series SoC.\n" - "> >> +\n" - "> >> +config S5P_EXT_INT\n" - "> >> + \302\240 \302\240 bool\n" - "> >> + \302\240 \302\240 help\n" - "> >> + \302\240 \302\240 \302\240 Use the external interrupts (other than GPIO interrupts.)\n" - "> >> diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile\n" - "> >> index a7c54b3..25941a5 100644\n" - "> >> --- a/arch/arm/plat-s5p/Makefile\n" - "> >> +++ b/arch/arm/plat-s5p/Makefile\n" - "> >> @@ -16,4 +16,5 @@ obj-y \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 += dev-uart.o\n" - "> >> \302\240obj-y \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240+= cpu.o\n" - "> >> \302\240obj-y \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240+= clock.o\n" - "> >> \302\240obj-y \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240+= irq.o\n" - "> >> +obj-$(CONFIG_S5P_EXT_INT) \302\240 \302\240+= irq-eint.o\n" - "> >> \302\240obj-y \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240+= setup-i2c0.o\n" - "> >> diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c\n" - "> >> new file mode 100644\n" - "> >> index 0000000..484a8fe\n" - "> >> --- /dev/null\n" - "> >> +++ b/arch/arm/plat-s5p/irq-eint.c\n" - "> >> @@ -0,0 +1,216 @@\n" - "> >> +/* linux/arch/arm/plat-s5p/irq-eint.c\n" - "> >> + *\n" - "> >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.\n" - "> >> + * \302\240 \302\240 \302\240 \302\240 \302\240 http://www.samsung.com\n" - "> >> + *\n" - "> >> + * S5P - IRQ EINT support\n" - "> >> + *\n" - "> >> + * This program is free software; you can redistribute it and/or modify\n" - "> >> + * it under the terms of the GNU General Public License version 2 as\n" - "> >> + * published by the Free Software Foundation.\n" - "> >> +*/\n" - "> >> +\n" - "> >> +#include <linux/kernel.h>\n" - "> >> +#include <linux/interrupt.h>\n" - "> >> +#include <linux/irq.h>\n" - "> >> +#include <linux/io.h>\n" - "> >> +#include <linux/sysdev.h>\n" - "> >> +#include <linux/gpio.h>\n" - "> >> +\n" - "> >> +#include <asm/bitops.h>\n" - "> >> +#include <asm/hardware/vic.h>\n" - "> >> +\n" - "> >> +#include <plat/regs-irqtype.h>\n" - "> >> +\n" - "> >> +#include <mach/map.h>\n" - "> >> +#include <plat/cpu.h>\n" - "> >> +#include <plat/pm.h>\n" - "> >> +\n" - "> >> +#include <plat/gpio-cfg.h>\n" - "> >> +#include <mach/regs-gpio.h>\n" - "> >> +\n" - "> >> +static inline void s5p_irq_eint_mask(unsigned int irq)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 u32 mask;\n" - "> >> +\n" - "> >> + \302\240 \302\240 mask = __raw_readl(S5P_EINT_MASK(eint_mask_reg(irq)));\n" - "> >> + \302\240 \302\240 mask |= eint_irq_to_bit(irq);\n" - "> >> + \302\240 \302\240 __raw_writel(mask, S5P_EINT_MASK(eint_mask_reg(irq)));\n" - "> >> +}\n" - "> >> +\n" - "> >> +static void s5p_irq_eint_unmask(unsigned int irq)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 u32 mask;\n" - "> >> +\n" - "> >> + \302\240 \302\240 mask = __raw_readl(S5P_EINT_MASK(eint_mask_reg(irq)));\n" - "> >> + \302\240 \302\240 mask &= ~(eint_irq_to_bit(irq));\n" - "> >> + \302\240 \302\240 __raw_writel(mask, S5P_EINT_MASK(eint_mask_reg(irq)));\n" - "> >> +}\n" - "> >> +\n" - "> >> +static inline void s5p_irq_eint_ack(unsigned int irq)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(eint_pend_reg(irq)));\n" - "> >> +}\n" - "> >> +\n" - "> >> +static void s5p_irq_eint_maskack(unsigned int irq)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 /* compiler should in-line these */\n" - "> >> + \302\240 \302\240 s5p_irq_eint_mask(irq);\n" - "> >> + \302\240 \302\240 s5p_irq_eint_ack(irq);\n" - "> >> +}\n" - "> >> +\n" - "> >> +static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 int offs = eint_offset(irq);\n" - "> >> + \302\240 \302\240 int shift;\n" - "> >> + \302\240 \302\240 u32 ctrl, mask;\n" - "> >> + \302\240 \302\240 u32 newvalue = 0;\n" - "> >> +\n" - "> >> + \302\240 \302\240 switch (type) {\n" - "> >> + \302\240 \302\240 case IRQ_TYPE_NONE:\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 printk(KERN_WARNING \"No edge setting!\\n\");\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 break;\n" - "> >> +\n" - "> >> + \302\240 \302\240 case IRQ_TYPE_EDGE_RISING:\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 newvalue = S5P_EXTINT_RISEEDGE;\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 break;\n" - "> >> +\n" - "> >> + \302\240 \302\240 case IRQ_TYPE_EDGE_FALLING:\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 newvalue = S5P_EXTINT_RISEEDGE;\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 break;\n" - "> >> +\n" - "> >> + \302\240 \302\240 case IRQ_TYPE_EDGE_BOTH:\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 newvalue = S5P_EXTINT_BOTHEDGE;\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 break;\n" - "> >> +\n" - "> >> + \302\240 \302\240 case IRQ_TYPE_LEVEL_LOW:\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 newvalue = S5P_EXTINT_LOWLEV;\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 break;\n" - "> >> +\n" - "> >> + \302\240 \302\240 case IRQ_TYPE_LEVEL_HIGH:\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 newvalue = S5P_EXTINT_HILEV;\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 break;\n" - "> >> +\n" - "> >> + \302\240 \302\240 default:\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 printk(KERN_ERR \"No such irq type %d\", type);\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 return -EINVAL;\n" - "> >> + \302\240 \302\240 }\n" - "> >> +\n" - "> >> + \302\240 \302\240 shift = (offs & 0x7) * 4;\n" - "> >> + \302\240 \302\240 mask = 0x7 << shift;\n" - "> >> +\n" - "> >> + \302\240 \302\240 ctrl = __raw_readl(S5P_EINT_CON(eint_conf_reg(irq)));\n" - "> >> + \302\240 \302\240 ctrl &= ~mask;\n" - "> >> + \302\240 \302\240 ctrl |= newvalue << shift;\n" - "> >> + \302\240 \302\240 __raw_writel(ctrl, S5P_EINT_CON(eint_conf_reg(irq)));\n" - "> >> +\n" - "> >> + \302\240 \302\240 if ((0 <= offs) && (offs < 8))\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 s3c_gpio_cfgpin(EINT_GPIO_REG0(offs & 0x7), EINT_MODE);\n" - "> >> +\n" - "> >> + \302\240 \302\240 else if ((8 <= offs) && (offs < 16))\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 s3c_gpio_cfgpin(EINT_GPIO_REG1(offs & 0x7), EINT_MODE);\n" - "> >> +\n" - "> >> + \302\240 \302\240 else if ((16 <= offs) && (offs < 24))\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 s3c_gpio_cfgpin(EINT_GPIO_REG2(offs & 0x7), EINT_MODE);\n" - "> >> +\n" - "> >> + \302\240 \302\240 else if ((24 <= offs) && (offs < 32))\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 s3c_gpio_cfgpin(EINT_GPIO_REG3(offs & 0x7), EINT_MODE);\n" - "> >> +\n" - "> >> + \302\240 \302\240 else\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 printk(KERN_ERR \"No such irq number %d\", offs);\n" - "> >> +\n" - "> >> + \302\240 \302\240 return 0;\n" - "> >> +}\n" - "> >> +\n" - "> >> +static struct irq_chip s5p_irq_eint = {\n" - "> >> + \302\240 \302\240 .name \302\240 \302\240 \302\240 \302\240 \302\240 = \"s5p-eint\",\n" - "> >> + \302\240 \302\240 .mask \302\240 \302\240 \302\240 \302\240 \302\240 = s5p_irq_eint_mask,\n" - "> >> + \302\240 \302\240 .unmask \302\240 \302\240 \302\240 \302\240 = s5p_irq_eint_unmask,\n" - "> >> + \302\240 \302\240 .mask_ack \302\240 \302\240 \302\240 = s5p_irq_eint_maskack,\n" - "> >> + \302\240 \302\240 .ack \302\240 \302\240 \302\240 \302\240 \302\240 \302\240= s5p_irq_eint_ack,\n" - "> >> + \302\240 \302\240 .set_type \302\240 \302\240 \302\240 = s5p_irq_eint_set_type,\n" - "> >> +#ifdef CONFIG_PM\n" - "> >> + \302\240 \302\240 .set_wake \302\240 \302\240 \302\240 = s3c_irqext_wake,\n" - "> >> +#endif\n" - "> >> +};\n" - "> >> +\n" - "> >> +/* s5p_irq_demux_eint\n" - "> >> + *\n" - "> >> + * This function demuxes the IRQ from the group0 external interrupts,\n" - "> >> + * from IRQ_EINT(16) to IRQ_EINT(31). It is designed to be inlined into\n" - "> >> + * the specific handlers s5p_irq_demux_eintX_Y.\n" - "> >> + */\n" - "> >> +static inline void s5p_irq_demux_eint(unsigned int start, unsigned int end)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 u32 status;\n" - "> >> + \302\240 \302\240 u32 mask = __raw_readl(S5P_EINT_MASK((start >> 3)));\n" - "> >> + \302\240 \302\240 unsigned int irq;\n" - "> >> +\n" - "> >> + \302\240 \302\240 status = __raw_readl(S5P_EINT_PEND((start >> 3)));\n" - "> >> + \302\240 \302\240 status &= ~mask;\n" - "> >> + \302\240 \302\240 status &= (1 << (end - start + 1)) - 1;\n" - "> >\n" - "> > We don't need to do any masking here as we'll always be processing all\n" - "> > interrupts from the controller. In fact, we probably don't need the end\n" - "> > argument here at-all.\n" - "> >\n" - "> >> + \302\240 \302\240 while (status) {\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 irq = fls(status);\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 generic_handle_irq(irq - 1 + IRQ_EINT(start));\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 status &= ~(1 << irq);\n" - "> >> + \302\240 \302\240 }\n" - "> >> +}\n" - "> >> +\n" - "> >> +static void s5p_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 s5p_irq_demux_eint(16, 23);\n" - "> >> + \302\240 \302\240 s5p_irq_demux_eint(24, 31);\n" - "\n" - "We can remove the end parameters, both interrupt banks are 8 IRQs and\n" - "this we can also make the bit clearing post mask a constant if it is\n" - "even needed.\n" - "\n" - "> >> +}\n" - "> >> +\n" - "> >> +static inline void s5p_irq_vic_eint_mask(unsigned int irq)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 s5p_irq_eint_mask(irq);\n" - "> >> +}\n" - "> >> +\n" - "> >> +static void s5p_irq_vic_eint_unmask(unsigned int irq)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 s5p_irq_eint_unmask(irq);\n" - "> >> +}\n" - "> >> +\n" - "> >> +static inline void s5p_irq_vic_eint_ack(unsigned int irq)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(eint_pend_reg(irq)));\n" - "> >> +}\n" - "> >> +\n" - "> >> +static void s5p_irq_vic_eint_maskack(unsigned int irq)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 s5p_irq_vic_eint_mask(irq);\n" - "> >> + \302\240 \302\240 s5p_irq_vic_eint_ack(irq);\n" - "> >> +}\n" - "> >> +\n" - "> >> +static struct irq_chip s5p_irq_vic_eint = {\n" - "> >> + \302\240 \302\240 .name \302\240 \302\240 \302\240 \302\240 \302\240 = \"s5p_vic_eint\",\n" - "> >> + \302\240 \302\240 .mask \302\240 \302\240 \302\240 \302\240 \302\240 = s5p_irq_vic_eint_mask,\n" - "> >> + \302\240 \302\240 .unmask \302\240 \302\240 \302\240 \302\240 = s5p_irq_vic_eint_unmask,\n" - "> >> + \302\240 \302\240 .mask_ack \302\240 \302\240 \302\240 = s5p_irq_vic_eint_maskack,\n" - "> >> + \302\240 \302\240 .ack \302\240 \302\240 \302\240 \302\240 \302\240 \302\240= s5p_irq_vic_eint_ack,\n" - "> >> + \302\240 \302\240 .set_type \302\240 \302\240 \302\240 = s5p_irq_eint_set_type,\n" - "> >> +#ifdef CONFIG_PM\n" - "> >> + \302\240 \302\240 .set_wake \302\240 \302\240 \302\240 = s3c_irqext_wake,\n" - "> >> +#endif\n" - "> >> +};\n" - "> >> +\n" - "> >> +int __init s5p_init_irq_eint(void)\n" - "> >> +{\n" - "> >> + \302\240 \302\240 int irq;\n" - "> >> +\n" - "> >> + \302\240 \302\240 for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++)\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 set_irq_chip(irq, &s5p_irq_vic_eint);\n" - "> >> +\n" - "> >> + \302\240 \302\240 for (irq = IRQ_EINT_GRP(16); irq <= IRQ_EINT_GRP(31); irq++) {\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 set_irq_chip(irq, &s5p_irq_eint);\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 set_irq_handler(irq, handle_level_irq);\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 set_irq_flags(irq, IRQF_VALID);\n" - "> >> + \302\240 \302\240 }\n" - "> >> +\n" - "> >> + \302\240 \302\240 set_irq_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31);\n" - "> >> + \302\240 \302\240 return 0;\n" - "> >> +}\n" - "> >> +\n" - "> >> +arch_initcall(s5p_init_irq_eint);\n" - "\n" - "-- \n" - "Ben\n" - "\n" - "Q: What's a light-year?\n" - A: One-third less calories than a regular year. + > > code easier to process? -c7eed4993bfa2db564e2efd6d33ea0eda4c4affac4d9d19fa2402ae98e4b86fd +d2f995b0f0f4159992199d063ed67b809366cdb215b2f90a506ef43e45e824c6
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