From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=52238 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OFOng-0005QT-2E for qemu-devel@nongnu.org; Fri, 21 May 2010 05:47:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OFOn0-0007I5-St for qemu-devel@nongnu.org; Fri, 21 May 2010 05:45:51 -0400 Received: from hall.aurel32.net ([88.191.82.174]:46404) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OFOn0-0007Hz-MZ for qemu-devel@nongnu.org; Fri, 21 May 2010 05:45:10 -0400 Date: Fri, 21 May 2010 11:44:57 +0200 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH 21/22] tcg-i386: Use lea for three-operand add. Message-ID: <20100521094457.GM1950@volta.aurel32.net> References: <4bba2d47c5a2b61e2e68b0546f27183b7277a5d4.1272479073.git.rth@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <4bba2d47c5a2b61e2e68b0546f27183b7277a5d4.1272479073.git.rth@twiddle.net> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org On Wed, Apr 14, 2010 at 01:29:27PM -0700, Richard Henderson wrote: > The result is shorter than the mov+add that TCG would > otherwise generate for us. > > Signed-off-by: Richard Henderson Acked-by: Aurelien Jarno > --- > tcg/i386/tcg-target.c | 23 ++++++++++++++++++++--- > 1 files changed, 20 insertions(+), 3 deletions(-) > > diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c > index 755d46d..646a7b6 100644 > --- a/tcg/i386/tcg-target.c > +++ b/tcg/i386/tcg-target.c > @@ -1186,6 +1186,25 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, > case INDEX_op_st_i32: > tcg_out_st(s, TCG_TYPE_I32, args[0], args[1], args[2]); > break; > + case INDEX_op_add_i32: > + /* For 3-operand addition, use LEA. */ > + if (args[0] != args[1]) { > + TCGArg a0 = args[0], a1 = args[1], a2 = args[2], c3 = 0; > + > + if (const_args[2]) { > + c3 = a2, a2 = -1; > + } else if (a0 == a2) { > + /* Watch out for dest = src + dest, since we've removed > + the matching constraint on the add. */ > + tgen_arithr(s, ARITH_ADD, a0, a1); > + break; > + } > + > + tcg_out_modrm_sib_offset(s, OPC_LEA, a0, a1, a2, 0, c3); > + break; > + } > + c = ARITH_ADD; > + goto gen_arith; > case INDEX_op_sub_i32: > c = ARITH_SUB; > goto gen_arith; > @@ -1198,8 +1217,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, > case INDEX_op_xor_i32: > c = ARITH_XOR; > goto gen_arith; > - case INDEX_op_add_i32: > - c = ARITH_ADD; > gen_arith: > if (const_args[2]) { > tgen_arithi(s, c, args[0], args[2], 0); > @@ -1374,7 +1391,7 @@ static const TCGTargetOpDef x86_op_defs[] = { > { INDEX_op_st16_i32, { "r", "r" } }, > { INDEX_op_st_i32, { "r", "r" } }, > > - { INDEX_op_add_i32, { "r", "0", "ri" } }, > + { INDEX_op_add_i32, { "r", "r", "ri" } }, > { INDEX_op_sub_i32, { "r", "0", "ri" } }, > { INDEX_op_mul_i32, { "r", "0", "ri" } }, > { INDEX_op_mulu2_i32, { "a", "d", "a", "r" } }, > -- > 1.6.6.1 > > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net