diff for duplicates of <20100601053255.GP7248@trinity.fluff.org> diff --git a/a/1.txt b/N1/1.txt index 811e329..7658b10 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -21,59 +21,59 @@ On Tue, Jun 01, 2010 at 02:13:18PM +0900, MyungJoo Ham wrote: > >> > >> This patch is based on Linus' master (2.6.35-rc1) > >> -> >> arch/arm/mach-s5pv210/Kconfig | 6 + -> >> arch/arm/mach-s5pv210/Makefile | 1 + -> >> arch/arm/mach-s5pv210/include/mach/pm-core.h | 44 ++++++ -> >> arch/arm/mach-s5pv210/include/mach/regs-clock.h | 5 +- -> >> arch/arm/mach-s5pv210/mach-smdkc110.c | 2 + -> >> arch/arm/mach-s5pv210/mach-smdkv210.c | 3 + -> >> arch/arm/mach-s5pv210/pm.c | 180 +++++++++++++++++++++++ -> >> arch/arm/mach-s5pv210/sleep.S | 166 +++++++++++++++++++++ -> >> arch/arm/plat-s5p/Makefile | 2 + -> >> arch/arm/plat-s5p/include/plat/irqs.h | 2 + -> >> arch/arm/plat-s5p/irq-pm.c | 108 ++++++++++++++ -> >> arch/arm/plat-s5p/pm.c | 52 +++++++ -> >> arch/arm/plat-samsung/pm-gpio.c | 4 +- -> >> 13 files changed, 572 insertions(+), 3 deletions(-) -> >> create mode 100644 arch/arm/mach-s5pv210/include/mach/pm-core.h -> >> create mode 100644 arch/arm/mach-s5pv210/pm.c -> >> create mode 100644 arch/arm/mach-s5pv210/sleep.S -> >> create mode 100644 arch/arm/plat-s5p/irq-pm.c -> >> create mode 100644 arch/arm/plat-s5p/pm.c +> >> ?arch/arm/mach-s5pv210/Kconfig ? ? ? ? ? ? ? ? ? | ? ?6 + +> >> ?arch/arm/mach-s5pv210/Makefile ? ? ? ? ? ? ? ? ?| ? ?1 + +> >> ?arch/arm/mach-s5pv210/include/mach/pm-core.h ? ?| ? 44 ++++++ +> >> ?arch/arm/mach-s5pv210/include/mach/regs-clock.h | ? ?5 +- +> >> ?arch/arm/mach-s5pv210/mach-smdkc110.c ? ? ? ? ? | ? ?2 + +> >> ?arch/arm/mach-s5pv210/mach-smdkv210.c ? ? ? ? ? | ? ?3 + +> >> ?arch/arm/mach-s5pv210/pm.c ? ? ? ? ? ? ? ? ? ? ?| ?180 +++++++++++++++++++++++ +> >> ?arch/arm/mach-s5pv210/sleep.S ? ? ? ? ? ? ? ? ? | ?166 +++++++++++++++++++++ +> >> ?arch/arm/plat-s5p/Makefile ? ? ? ? ? ? ? ? ? ? ?| ? ?2 + +> >> ?arch/arm/plat-s5p/include/plat/irqs.h ? ? ? ? ? | ? ?2 + +> >> ?arch/arm/plat-s5p/irq-pm.c ? ? ? ? ? ? ? ? ? ? ?| ?108 ++++++++++++++ +> >> ?arch/arm/plat-s5p/pm.c ? ? ? ? ? ? ? ? ? ? ? ? ?| ? 52 +++++++ +> >> ?arch/arm/plat-samsung/pm-gpio.c ? ? ? ? ? ? ? ? | ? ?4 +- +> >> ?13 files changed, 572 insertions(+), 3 deletions(-) +> >> ?create mode 100644 arch/arm/mach-s5pv210/include/mach/pm-core.h +> >> ?create mode 100644 arch/arm/mach-s5pv210/pm.c +> >> ?create mode 100644 arch/arm/mach-s5pv210/sleep.S +> >> ?create mode 100644 arch/arm/plat-s5p/irq-pm.c +> >> ?create mode 100644 arch/arm/plat-s5p/pm.c > >> > >> diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig > >> index 0761eac..86cca1b 100644 > >> --- a/arch/arm/mach-s5pv210/Kconfig > >> +++ b/arch/arm/mach-s5pv210/Kconfig > >> @@ -14,6 +14,7 @@ config CPU_S5PV210 -> >> select PLAT_S5P -> >> select S3C_PL330_DMA -> >> select S5P_EXT_INT -> >> + select S5PV210_PM if PM -> >> help -> >> Enable S5PV210 CPU support +> >> ? ? ? select PLAT_S5P +> >> ? ? ? select S3C_PL330_DMA +> >> ? ? ? select S5P_EXT_INT +> >> + ? ? select S5PV210_PM if PM +> >> ? ? ? help +> >> ? ? ? ? Enable S5PV210 CPU support > >> > >> @@ -88,4 +89,9 @@ config MACH_SMDKC110 -> >> Machine support for Samsung SMDKC110 -> >> S5PC110(MCP) is one of package option of S5PV210 +> >> ? ? ? ? Machine support for Samsung SMDKC110 +> >> ? ? ? ? S5PC110(MCP) is one of package option of S5PV210 > >> > >> +config S5PV210_PM -> >> + bool -> >> + help -> >> + Power Management code common to S5PV210 +> >> + ? ? bool +> >> + ? ? help +> >> + ? ? ? Power Management code common to S5PV210 > >> + -> >> endif +> >> ?endif > >> diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile > >> index 30be9a6..59382ec 100644 > >> --- a/arch/arm/mach-s5pv210/Makefile > >> +++ b/arch/arm/mach-s5pv210/Makefile -> >> @@ -14,6 +14,7 @@ obj- := +> >> @@ -14,6 +14,7 @@ obj- ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?:= > >> -> >> obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o gpiolib.o -> >> obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o -> >> +obj-$(CONFIG_S5PV210_PM) += pm.o sleep.o +> >> ?obj-$(CONFIG_CPU_S5PV210) ? ?+= cpu.o init.o clock.o dma.o gpiolib.o +> >> ?obj-$(CONFIG_CPU_S5PV210) ? ?+= setup-i2c0.o +> >> +obj-$(CONFIG_S5PV210_PM) ? ? += pm.o sleep.o > >> -> >> # machine support +> >> ?# machine support > >> > >> diff --git a/arch/arm/mach-s5pv210/include/mach/pm-core.h b/arch/arm/mach-s5pv210/include/mach/pm-core.h > >> new file mode 100644 @@ -84,12 +84,12 @@ On Tue, Jun 01, 2010 at 02:13:18PM +0900, MyungJoo Ham wrote: > >> +/* linux/arch/arm/mach-s5pv210/include/mach/pm-core.h > >> + * > >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd. -> >> + * http://www.samsung.com +> >> + * ? ? ? ? ? http://www.samsung.com > >> + * > >> + * Based on arch/arm/mach-s3c2410/include/mach/pm-core.h, > >> + * Copyright 2008 Simtec Electronics -> >> + * Ben Dooks <ben@simtec.co.uk> -> >> + * http://armlinux.simtec.co.uk/ +> >> + * ? ? ?Ben Dooks <ben@simtec.co.uk> +> >> + * ? ? ?http://armlinux.simtec.co.uk/ > >> + * > >> + * S5PV210 - PM core support for arch/arm/plat-s5p/pm.c > >> + * @@ -100,29 +100,29 @@ On Tue, Jun 01, 2010 at 02:13:18PM +0900, MyungJoo Ham wrote: > >> + > >> +static inline void s3c_pm_debug_init_uart(void) > >> +{ -> >> + /* nothing here yet */ +> >> + ? ? /* nothing here yet */ > >> +} > >> + > >> +static inline void s3c_pm_arch_prepare_irqs(void) > >> +{ -> >> + __raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK); -> >> + __raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK); +> >> + ? ? __raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK); +> >> + ? ? __raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK); > >> +} > >> + > >> +static inline void s3c_pm_arch_stop_clocks(void) > >> +{ -> >> + /* nothing here yet */ +> >> + ? ? /* nothing here yet */ > >> +} > >> + > >> +static inline void s3c_pm_arch_show_resume_irqs(void) > >> +{ -> >> + /* nothing here yet */ +> >> + ? ? /* nothing here yet */ > >> +} > >> + > >> +static inline void s3c_pm_arch_update_uart(void __iomem *regs, -> >> + struct pm_uart_save *save) +> >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?struct pm_uart_save *save) > >> +{ -> >> + /* nothing here yet */ +> >> + ? ? /* nothing here yet */ > >> +} > >> + > >> diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h @@ -130,59 +130,59 @@ On Tue, Jun 01, 2010 at 02:13:18PM +0900, MyungJoo Ham wrote: > >> --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h > >> +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h > >> @@ -157,8 +157,11 @@ -> >> #define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) +> >> ?#define S5P_SLEEP_CFG_USBOSC_EN ? ? ? ? ? ? ?(1 << 1) > >> -> >> /* OTHERS Resgister */ -> >> +#define S5P_OTHERS_RET_IO (1 << 31) -> >> +#define S5P_OTHERS_RET_CF (1 << 30) -> >> +#define S5P_OTHERS_RET_MMC (1 << 29) -> >> +#define S5P_OTHERS_RET_UART (1 << 28) -> >> #define S5P_OTHERS_USB_SIG_MASK (1 << 16) -> >> -#define S5P_OTHERS_MIPI_DPHY_EN (1 << 28) +> >> ?/* OTHERS Resgister */ +> >> +#define S5P_OTHERS_RET_IO ? ? ? ? ? ?(1 << 31) +> >> +#define S5P_OTHERS_RET_CF ? ? ? ? ? ?(1 << 30) +> >> +#define S5P_OTHERS_RET_MMC ? ? ? ? ? (1 << 29) +> >> +#define S5P_OTHERS_RET_UART ? ? ? ? ?(1 << 28) +> >> ?#define S5P_OTHERS_USB_SIG_MASK ? ? ? ? ? ? ?(1 << 16) +> >> -#define S5P_OTHERS_MIPI_DPHY_EN ? ? ? ? ? ? ?(1 << 28) > >> -> >> /* MIPI */ -> >> #define S5P_MIPI_DPHY_EN (3) +> >> ?/* MIPI */ +> >> ?#define S5P_MIPI_DPHY_EN ? ? ? ? ? ? (3) > >> diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c > >> index 4c8903c..ebb4832 100644 > >> --- a/arch/arm/mach-s5pv210/mach-smdkc110.c > >> +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c > >> @@ -25,6 +25,7 @@ -> >> #include <plat/s5pv210.h> -> >> #include <plat/devs.h> -> >> #include <plat/cpu.h> +> >> ?#include <plat/s5pv210.h> +> >> ?#include <plat/devs.h> +> >> ?#include <plat/cpu.h> > >> +#include <plat/pm.h> > >> -> >> /* Following are default values for UCON, ULCON and UFCON UART registers */ -> >> #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ +> >> ?/* Following are default values for UCON, ULCON and UFCON UART registers */ +> >> ?#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | ? ? ? ?\ > >> @@ -86,6 +87,7 @@ static void __init smdkc110_map_io(void) > >> -> >> static void __init smdkc110_machine_init(void) -> >> { -> >> + s3c_pm_init(); -> >> platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); -> >> } +> >> ?static void __init smdkc110_machine_init(void) +> >> ?{ +> >> + ? ? s3c_pm_init(); +> >> ? ? ? platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); +> >> ?} > >> > >> diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c > >> index 0d46279..ba30b5d 100644 > >> --- a/arch/arm/mach-s5pv210/mach-smdkv210.c > >> +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c > >> @@ -27,6 +27,7 @@ -> >> #include <plat/cpu.h> -> >> #include <plat/adc.h> -> >> #include <plat/ts.h> +> >> ?#include <plat/cpu.h> +> >> ?#include <plat/adc.h> +> >> ?#include <plat/ts.h> > >> +#include <plat/pm.h> > >> -> >> /* Following are default values for UCON, ULCON and UFCON UART registers */ -> >> #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ +> >> ?/* Following are default values for UCON, ULCON and UFCON UART registers */ +> >> ?#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | ? ? ? ?\ > >> @@ -96,6 +97,8 @@ static void __init smdkv210_map_io(void) > >> -> >> static void __init smdkv210_machine_init(void) -> >> { -> >> + s3c_pm_init(); +> >> ?static void __init smdkv210_machine_init(void) +> >> ?{ +> >> + ? ? s3c_pm_init(); > >> + -> >> s3c24xx_ts_set_platdata(&s3c_ts_platform); -> >> platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); -> >> } +> >> ? ? ? s3c24xx_ts_set_platdata(&s3c_ts_platform); +> >> ? ? ? platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); +> >> ?} > >> diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c > >> new file mode 100644 > >> index 0000000..0690332 @@ -192,13 +192,13 @@ On Tue, Jun 01, 2010 at 02:13:18PM +0900, MyungJoo Ham wrote: > >> +/* linux/arch/arm/mach-s5pv210/pm.c > >> + * > >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd. -> >> + * http://www.samsung.com +> >> + * ? ? ? ? ? http://www.samsung.com > >> + * > >> + * S5PV210 - Power Management support > >> + * > >> + * Based on arch/arm/mach-s3c2410/pm.c > >> + * Copyright (c) 2006 Simtec Electronics -> >> + * Ben Dooks <ben@simtec.co.uk> +> >> + * ? Ben Dooks <ben@simtec.co.uk> > >> + * > >> + * This program is free software; you can redistribute it and/or modify > >> + * it under the terms of the GNU General Public License version 2 as @@ -217,73 +217,73 @@ On Tue, Jun 01, 2010 at 02:13:18PM +0900, MyungJoo Ham wrote: > >> +#include <mach/regs-clock.h> > >> + > >> +static struct sleep_save s5pv210_core_save[] = { -> >> + /* Clock source */ -> >> + SAVE_ITEM(S5P_CLK_SRC0), -> >> + SAVE_ITEM(S5P_CLK_SRC1), -> >> + SAVE_ITEM(S5P_CLK_SRC2), -> >> + SAVE_ITEM(S5P_CLK_SRC3), -> >> + SAVE_ITEM(S5P_CLK_SRC4), -> >> + SAVE_ITEM(S5P_CLK_SRC5), -> >> + SAVE_ITEM(S5P_CLK_SRC6), -> >> + -> >> + /* Clock source Mask */ -> >> + SAVE_ITEM(S5P_CLK_SRC_MASK0), -> >> + SAVE_ITEM(S5P_CLK_SRC_MASK1), -> >> + -> >> + /* Clock Divider */ -> >> + SAVE_ITEM(S5P_CLK_DIV0), -> >> + SAVE_ITEM(S5P_CLK_DIV1), -> >> + SAVE_ITEM(S5P_CLK_DIV2), -> >> + SAVE_ITEM(S5P_CLK_DIV3), -> >> + SAVE_ITEM(S5P_CLK_DIV4), -> >> + SAVE_ITEM(S5P_CLK_DIV5), -> >> + SAVE_ITEM(S5P_CLK_DIV6), -> >> + SAVE_ITEM(S5P_CLK_DIV7), -> >> + -> >> + /* Clock Main Gate */ -> >> + SAVE_ITEM(S5P_CLKGATE_MAIN0), -> >> + SAVE_ITEM(S5P_CLKGATE_MAIN1), -> >> + SAVE_ITEM(S5P_CLKGATE_MAIN2), -> >> + -> >> + /* Clock source Peri Gate */ -> >> + SAVE_ITEM(S5P_CLKGATE_PERI0), -> >> + SAVE_ITEM(S5P_CLKGATE_PERI1), -> >> + -> >> + /* Clock source SCLK Gate */ -> >> + SAVE_ITEM(S5P_CLKGATE_SCLK0), -> >> + SAVE_ITEM(S5P_CLKGATE_SCLK1), -> >> + -> >> + /* Clock IP Clock gate */ -> >> + SAVE_ITEM(S5P_CLKGATE_IP0), -> >> + SAVE_ITEM(S5P_CLKGATE_IP1), -> >> + SAVE_ITEM(S5P_CLKGATE_IP2), -> >> + SAVE_ITEM(S5P_CLKGATE_IP3), -> >> + SAVE_ITEM(S5P_CLKGATE_IP4), -> >> + -> >> + /* Clock Blcok and Bus gate */ -> >> + SAVE_ITEM(S5P_CLKGATE_BLOCK), -> >> + SAVE_ITEM(S5P_CLKGATE_BUS0), -> >> + -> >> + /* Clock ETC */ -> >> + SAVE_ITEM(S5P_CLK_OUT), -> >> + SAVE_ITEM(S5P_MDNIE_SEL), -> >> + -> >> + /* PWM Register */ -> >> + SAVE_ITEM(S3C2410_TCFG0), -> >> + SAVE_ITEM(S3C2410_TCFG1), -> >> + SAVE_ITEM(S3C64XX_TINT_CSTAT), -> >> + SAVE_ITEM(S3C2410_TCON), -> >> + SAVE_ITEM(S3C2410_TCNTB(0)), -> >> + SAVE_ITEM(S3C2410_TCMPB(0)), -> >> + SAVE_ITEM(S3C2410_TCNTO(0)), -> >> + -> >> + /* VIC 2 and 3*/ -> >> + SAVE_ITEM(VA_VIC2 + VIC_INT_SELECT), -> >> + SAVE_ITEM(VA_VIC3 + VIC_INT_SELECT), -> >> + SAVE_ITEM(VA_VIC2 + VIC_INT_ENABLE), -> >> + SAVE_ITEM(VA_VIC3 + VIC_INT_ENABLE), -> >> + SAVE_ITEM(VA_VIC2 + VIC_INT_SOFT), -> >> + SAVE_ITEM(VA_VIC3 + VIC_INT_SOFT), +> >> + ? ? /* Clock source */ +> >> + ? ? SAVE_ITEM(S5P_CLK_SRC0), +> >> + ? ? SAVE_ITEM(S5P_CLK_SRC1), +> >> + ? ? SAVE_ITEM(S5P_CLK_SRC2), +> >> + ? ? SAVE_ITEM(S5P_CLK_SRC3), +> >> + ? ? SAVE_ITEM(S5P_CLK_SRC4), +> >> + ? ? SAVE_ITEM(S5P_CLK_SRC5), +> >> + ? ? SAVE_ITEM(S5P_CLK_SRC6), +> >> + +> >> + ? ? /* Clock source Mask */ +> >> + ? ? SAVE_ITEM(S5P_CLK_SRC_MASK0), +> >> + ? ? SAVE_ITEM(S5P_CLK_SRC_MASK1), +> >> + +> >> + ? ? /* Clock Divider */ +> >> + ? ? SAVE_ITEM(S5P_CLK_DIV0), +> >> + ? ? SAVE_ITEM(S5P_CLK_DIV1), +> >> + ? ? SAVE_ITEM(S5P_CLK_DIV2), +> >> + ? ? SAVE_ITEM(S5P_CLK_DIV3), +> >> + ? ? SAVE_ITEM(S5P_CLK_DIV4), +> >> + ? ? SAVE_ITEM(S5P_CLK_DIV5), +> >> + ? ? SAVE_ITEM(S5P_CLK_DIV6), +> >> + ? ? SAVE_ITEM(S5P_CLK_DIV7), +> >> + +> >> + ? ? /* Clock Main Gate */ +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_MAIN0), +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_MAIN1), +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_MAIN2), +> >> + +> >> + ? ? /* Clock source Peri Gate */ +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_PERI0), +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_PERI1), +> >> + +> >> + ? ? /* Clock source SCLK Gate */ +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_SCLK0), +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_SCLK1), +> >> + +> >> + ? ? /* Clock IP Clock gate */ +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_IP0), +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_IP1), +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_IP2), +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_IP3), +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_IP4), +> >> + +> >> + ? ? /* Clock Blcok and Bus gate */ +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_BLOCK), +> >> + ? ? SAVE_ITEM(S5P_CLKGATE_BUS0), +> >> + +> >> + ? ? /* Clock ETC */ +> >> + ? ? SAVE_ITEM(S5P_CLK_OUT), +> >> + ? ? SAVE_ITEM(S5P_MDNIE_SEL), +> >> + +> >> + ? ? /* PWM Register */ +> >> + ? ? SAVE_ITEM(S3C2410_TCFG0), +> >> + ? ? SAVE_ITEM(S3C2410_TCFG1), +> >> + ? ? SAVE_ITEM(S3C64XX_TINT_CSTAT), +> >> + ? ? SAVE_ITEM(S3C2410_TCON), +> >> + ? ? SAVE_ITEM(S3C2410_TCNTB(0)), +> >> + ? ? SAVE_ITEM(S3C2410_TCMPB(0)), +> >> + ? ? SAVE_ITEM(S3C2410_TCNTO(0)), +> >> + +> >> + ? ? /* VIC 2 and 3*/ +> >> + ? ? SAVE_ITEM(VA_VIC2 + VIC_INT_SELECT), +> >> + ? ? SAVE_ITEM(VA_VIC3 + VIC_INT_SELECT), +> >> + ? ? SAVE_ITEM(VA_VIC2 + VIC_INT_ENABLE), +> >> + ? ? SAVE_ITEM(VA_VIC3 + VIC_INT_ENABLE), +> >> + ? ? SAVE_ITEM(VA_VIC2 + VIC_INT_SOFT), +> >> + ? ? SAVE_ITEM(VA_VIC3 + VIC_INT_SOFT), > > > > doesn't the vic driver do this for you? if not, then would be better > > to change the vic to fix this. @@ -318,19 +318,19 @@ it isn't as if it fails silently.. > >> + > >> +void s5pv210_cpu_suspend(void) > >> +{ -> >> + unsigned long tmp; +> >> + ? ? unsigned long tmp; > >> + -> >> + /* issue the standby signal into the pm unit. Note, we -> >> + * issue a write-buffer drain just in case */ +> >> + ? ? /* issue the standby signal into the pm unit. Note, we +> >> + ? ? ?* issue a write-buffer drain just in case */ > >> + -> >> + tmp = 0; +> >> + ? ? tmp = 0; > >> + -> >> + asm("b 1f\n\t" -> >> + ".align 5\n\t" -> >> + "1:\n\t" -> >> + "mcr p15, 0, %0, c7, c10, 5\n\t" -> >> + "mcr p15, 0, %0, c7, c10, 4\n\t" -> >> + ".word 0xe320f003" : : "r" (tmp)); +> >> + ? ? asm("b 1f\n\t" +> >> + ? ? ? ? ".align 5\n\t" +> >> + ? ? ? ? "1:\n\t" +> >> + ? ? ? ? "mcr p15, 0, %0, c7, c10, 5\n\t" +> >> + ? ? ? ? "mcr p15, 0, %0, c7, c10, 4\n\t" +> >> + ? ? ? ? ".word 0xe320f003" : : "r" (tmp)); > > > > why .word? if there's a compiler problem then make a comment about > > what instruction is being synthesised and why. @@ -338,36 +338,36 @@ it isn't as if it fails silently.. > ".word 0xe320f003" may be replaced by "wfi". (wait-for-interrupt) > > > -> >> + /* we should never get past here */ -> >> + panic("sleep resumed to originator?"); +> >> + ? ? /* we should never get past here */ +> >> + ? ? panic("sleep resumed to originator?"); > >> +} > >> + > >> +static void s5pv210_pm_prepare(void) > >> +{ -> >> + unsigned int tmp; -> >> + -> >> + /* ensure at least INFORM0 has the resume address */ -> >> + __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0); -> >> + -> >> + tmp = __raw_readl(S5P_SLEEP_CFG); -> >> + tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN); -> >> + __raw_writel(tmp, S5P_SLEEP_CFG); -> >> + -> >> + /* WFI for SLEEP mode configuration by SYSCON */ -> >> + tmp = __raw_readl(S5P_PWR_CFG); -> >> + tmp &= S5P_CFG_WFI_CLEAN; -> >> + tmp |= S5P_CFG_WFI_SLEEP; -> >> + __raw_writel(tmp, S5P_PWR_CFG); -> >> + -> >> + /* SYSCON interrupt handling disable */ -> >> + tmp = __raw_readl(S5P_OTHERS); -> >> + tmp |= S5P_OTHER_SYSC_INTOFF; -> >> + __raw_writel(tmp, S5P_OTHERS); -> >> + -> >> + __raw_writel(0xffffffff, (VA_VIC0 + VIC_INT_ENABLE_CLEAR)); -> >> + __raw_writel(0xffffffff, (VA_VIC1 + VIC_INT_ENABLE_CLEAR)); -> >> + __raw_writel(0xffffffff, (VA_VIC2 + VIC_INT_ENABLE_CLEAR)); -> >> + __raw_writel(0xffffffff, (VA_VIC3 + VIC_INT_ENABLE_CLEAR)); +> >> + ? ? unsigned int tmp; +> >> + +> >> + ? ? /* ensure at least INFORM0 has the resume address */ +> >> + ? ? __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0); +> >> + +> >> + ? ? tmp = __raw_readl(S5P_SLEEP_CFG); +> >> + ? ? tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN); +> >> + ? ? __raw_writel(tmp, S5P_SLEEP_CFG); +> >> + +> >> + ? ? /* WFI for SLEEP mode configuration by SYSCON */ +> >> + ? ? tmp = __raw_readl(S5P_PWR_CFG); +> >> + ? ? tmp &= S5P_CFG_WFI_CLEAN; +> >> + ? ? tmp |= S5P_CFG_WFI_SLEEP; +> >> + ? ? __raw_writel(tmp, S5P_PWR_CFG); +> >> + +> >> + ? ? /* SYSCON interrupt handling disable */ +> >> + ? ? tmp = __raw_readl(S5P_OTHERS); +> >> + ? ? tmp |= S5P_OTHER_SYSC_INTOFF; +> >> + ? ? __raw_writel(tmp, S5P_OTHERS); +> >> + +> >> + ? ? __raw_writel(0xffffffff, (VA_VIC0 + VIC_INT_ENABLE_CLEAR)); +> >> + ? ? __raw_writel(0xffffffff, (VA_VIC1 + VIC_INT_ENABLE_CLEAR)); +> >> + ? ? __raw_writel(0xffffffff, (VA_VIC2 + VIC_INT_ENABLE_CLEAR)); +> >> + ? ? __raw_writel(0xffffffff, (VA_VIC3 + VIC_INT_ENABLE_CLEAR)); > > It appears to be omitting VIC_INT_SOFT_CLEAR. I'm not sure whether > this is also required as VIC_INT_ENABLE_CLEAR does; however, we've @@ -384,29 +384,29 @@ it isn't as if it fails silently.. > S5PC110. > > >> + -> >> + s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); +> >> + ? ? s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); > >> +} > >> + > >> +static int s5pv210_pm_add(struct sys_device *sysdev) > >> +{ -> >> + pm_cpu_prep = s5pv210_pm_prepare; -> >> + pm_cpu_sleep = s5pv210_cpu_suspend; +> >> + ? ? pm_cpu_prep = s5pv210_pm_prepare; +> >> + ? ? pm_cpu_sleep = s5pv210_cpu_suspend; > >> + -> >> + return 0; +> >> + ? ? return 0; > >> +} > >> + > >> +static int s5pv210_pm_resume(struct sys_device *dev) > >> +{ -> >> + u32 tmp; +> >> + ? ? u32 tmp; > >> + -> >> + tmp = __raw_readl(S5P_OTHERS); -> >> + tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF | \ -> >> + S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART); -> >> + __raw_writel(tmp , S5P_OTHERS); +> >> + ? ? tmp = __raw_readl(S5P_OTHERS); +> >> + ? ? tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF | \ +> >> + ? ? ? ? ? ? S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART); +> >> + ? ? __raw_writel(tmp , S5P_OTHERS); > >> + -> >> + s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); +> >> + ? ? s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); > >> + -> >> + return 0; +> >> + ? ? return 0; > >> +} > > I don't know how may "printk"s exist after s3c_pm_enter is returned @@ -420,13 +420,13 @@ it isn't as if it fails silently.. > > >> + > >> +static struct sysdev_driver s5pv210_pm_driver = { -> >> + .add = s5pv210_pm_add, -> >> + .resume = s5pv210_pm_resume, +> >> + ? ? .add ? ? ? ? ? ?= s5pv210_pm_add, +> >> + ? ? .resume ? ? ? ? = s5pv210_pm_resume, > >> +}; > >> + > >> +static __init int s5pv210_pm_drvinit(void) > >> +{ -> >> + return sysdev_driver_register(&s5pv210_sysclass, &s5pv210_pm_driver); +> >> + ? ? return sysdev_driver_register(&s5pv210_sysclass, &s5pv210_pm_driver); > >> +} > >> +arch_initcall(s5pv210_pm_drvinit); > >> diff --git a/arch/arm/mach-s5pv210/sleep.S b/arch/arm/mach-s5pv210/sleep.S @@ -438,16 +438,16 @@ it isn't as if it fails silently.. > >> +/* linux/arch/arm/mach-s5pv210/sleep.S > >> + * > >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd. -> >> + * http://www.samsung.com +> >> + * ? ? ? ? ? http://www.samsung.com > >> + * > >> + * S5PV210 power Manager (Suspend-To-RAM) support > >> + * > >> + * Based on S3C2410 sleep code by: -> >> + * Ben Dooks, (c) 2004 Simtec Electronics +> >> + * ? Ben Dooks, (c) 2004 Simtec Electronics > >> + * > >> + * Based on PXA/SA1100 sleep code by: -> >> + * Nicolas Pitre, (c) 2002 Monta Vista Software Inc -> >> + * Cliff Brake, (c) 2001 +> >> + * ? Nicolas Pitre, (c) 2002 Monta Vista Software Inc +> >> + * ? Cliff Brake, (c) 2001 > >> + * > >> + * This program is free software; you can redistribute it and/or modify > >> + * it under the terms of the GNU General Public License as published by @@ -456,184 +456,184 @@ it isn't as if it fails silently.. > >> + * > >> + * This program is distributed in the hope that it will be useful, > >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of -> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the > >> + * GNU General Public License for more details. > >> + * > >> + * You should have received a copy of the GNU General Public License > >> + * along with this program; if not, write to the Free Software -> >> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +> >> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA ?02111-1307 ?USA > >> +*/ > >> + > >> +#include <linux/linkage.h> > >> +#include <asm/assembler.h> > >> +#include <asm/memory.h> > >> + -> >> + .text +> >> + ? ? .text > >> + -> >> + /* s3c_cpu_save -> >> + * -> >> + * entry: -> >> + * r0 = save address (virtual addr of s3c_sleep_save_phys) -> >> + */ +> >> + ? ? /* s3c_cpu_save +> >> + ? ? ?* +> >> + ? ? ?* entry: +> >> + ? ? ?* ? ? ?r0 = save address (virtual addr of s3c_sleep_save_phys) +> >> + ? ? */ > >> + > >> +ENTRY(s3c_cpu_save) > >> + -> >> + stmfd sp!, { r3 - r12, lr } +> >> + ? ? stmfd ? sp!, { r3 - r12, lr } > >> + -> >> + mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID -> >> + mrc p15, 0, r5, c3, c0, 0 @ Domain ID -> >> + mrc p15, 0, r6, c2, c0, 0 @ Translation Table BASE0 -> >> + mrc p15, 0, r7, c2, c0, 1 @ Translation Table BASE1 -> >> + mrc p15, 0, r8, c2, c0, 2 @ Translation Table Control -> >> + mrc p15, 0, r9, c1, c0, 0 @ Control register -> >> + mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register -> >> + mrc p15, 0, r11, c1, c0, 2 @ Co-processor access controls -> >> + mrc p15, 0, r12, c10, c2, 0 @ Read PRRR -> >> + mrc p15, 0, r3, c10, c2, 1 @ READ NMRR +> >> + ? ? mrc ? ? p15, 0, r4, c13, c0, 0 ?@ FCSE/PID +> >> + ? ? mrc ? ? p15, 0, r5, c3, c0, 0 ? @ Domain ID +> >> + ? ? mrc ? ? p15, 0, r6, c2, c0, 0 ? @ Translation Table BASE0 +> >> + ? ? mrc ? ? p15, 0, r7, c2, c0, 1 ? @ Translation Table BASE1 +> >> + ? ? mrc ? ? p15, 0, r8, c2, c0, 2 ? @ Translation Table Control +> >> + ? ? mrc ? ? p15, 0, r9, c1, c0, 0 ? @ Control register +> >> + ? ? mrc ? ? p15, 0, r10, c1, c0, 1 ?@ Auxiliary control register +> >> + ? ? mrc ? ? p15, 0, r11, c1, c0, 2 ?@ Co-processor access controls +> >> + ? ? mrc ? ? p15, 0, r12, c10, c2, 0 @ Read PRRR +> >> + ? ? mrc ? ? p15, 0, r3, c10, c2, 1 ?@ READ NMRR > >> + -> >> + stmia r0, { r3 - r13 } +> >> + ? ? stmia ? r0, { r3 - r13 } > >> + -> >> + bl s3c_pm_cb_flushcache +> >> + ? ? bl ? ? ?s3c_pm_cb_flushcache > >> + -> >> + ldr r0, =pm_cpu_sleep -> >> + ldr r0, [ r0 ] -> >> + mov pc, r0 +> >> + ? ? ldr ? ? r0, =pm_cpu_sleep +> >> + ? ? ldr ? ? r0, [ r0 ] +> >> + ? ? mov ? ? pc, r0 > >> + > >> +resume_with_mmu: -> >> + /* delete added mmu table list */ +> >> + ? ? /* delete added mmu table list */ > > > > hmm, where is this being added? > > also, a better description on what it is doing would be better. > > -> >> + ldr r9 , =(PAGE_OFFSET - PHYS_OFFSET) -> >> + add r4, r4, r9 -> >> + str r12, [r4] +> >> + ? ? ldr ? ? r9 , =(PAGE_OFFSET - PHYS_OFFSET) +> >> + ? ? add ? ? r4, r4, r9 +> >> + ? ? str ? ? r12, [r4] > >> + -> >> + ldmfd sp!, { r3 - r12, pc } +> >> + ? ? ldmfd ? sp!, { r3 - r12, pc } > >> + -> >> + .ltorg +> >> + ? ? .ltorg > >> + -> >> + .data +> >> + ? ? .data > >> + -> >> + .global s3c_sleep_save_phys +> >> + ? ? .global s3c_sleep_save_phys > >> +s3c_sleep_save_phys: -> >> + .word 0 +> >> + ? ? .word ? 0 > >> + -> >> + /* sleep magic, to allow the bootloader to check for an valid -> >> + * image to resume to. Must be the first word before the -> >> + * s3c_cpu_resume entry. -> >> + */ +> >> + ? ? /* sleep magic, to allow the bootloader to check for an valid +> >> + ? ? ?* image to resume to. Must be the first word before the +> >> + ? ? ?* s3c_cpu_resume entry. +> >> + ? ? */ > >> + -> >> + .word 0x2bedf00d +> >> + ? ? .word ? 0x2bedf00d > >> + -> >> + /* s3c_cpu_resume -> >> + * -> >> + * resume code entry for bootloader to call -> >> + * -> >> + * we must put this code here in the data segment as we have no -> >> + * other way of restoring the stack pointer after sleep, and we -> >> + * must not write to the code segment (code is read-only) -> >> + */ +> >> + ? ? /* s3c_cpu_resume +> >> + ? ? ?* +> >> + ? ? ?* resume code entry for bootloader to call +> >> + ? ? ?* +> >> + ? ? ?* we must put this code here in the data segment as we have no +> >> + ? ? ?* other way of restoring the stack pointer after sleep, and we +> >> + ? ? ?* must not write to the code segment (code is read-only) +> >> + ? ? */ > >> + > >> +ENTRY(s3c_cpu_resume) -> >> + mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE -> >> + msr cpsr_c, r0 +> >> + ? ? mov ? ? r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE +> >> + ? ? msr ? ? cpsr_c, r0 > >> + -> >> + mov r1, #0 -> >> + mcr p15, 0, r1, c8, c7, 0 @@ invalidate TLBs -> >> + mcr p15, 0, r1, c7, c5, 0 @@ invalidate I Cache +> >> + ? ? mov ? ? r1, #0 +> >> + ? ? mcr ? ? p15, 0, r1, c8, c7, 0 ? ? ? ? ? @@ invalidate TLBs +> >> + ? ? mcr ? ? p15, 0, r1, c7, c5, 0 ? ? ? ? ? @@ invalidate I Cache > >> + -> >> + ldr r0, s3c_sleep_save_phys @ address of restore block -> >> + ldmia r0, { r3 - r13 } +> >> + ? ? ldr ? ? r0, s3c_sleep_save_phys ? ? ? ? @ address of restore block +> >> + ? ? ldmia ? r0, { r3 - r13 } > >> + -> >> + mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID -> >> + mcr p15, 0, r5, c3, c0, 0 @ Domain ID +> >> + ? ? mcr ? ? p15, 0, r4, c13, c0, 0 ? ? ? ? ?@ FCSE/PID +> >> + ? ? mcr ? ? p15, 0, r5, c3, c0, 0 ? ? ? ? ? @ Domain ID > >> + -> >> + mcr p15, 0, r8, c2, c0, 2 @ Translation Table Control -> >> + mcr p15, 0, r7, c2, c0, 1 @ Translation Table BASE1 -> >> + mcr p15, 0, r6, c2, c0, 0 @ Translation Table BASE0 +> >> + ? ? mcr ? ? p15, 0, r8, c2, c0, 2 ? ? ? ? ? @ Translation Table Control +> >> + ? ? mcr ? ? p15, 0, r7, c2, c0, 1 ? ? ? ? ? @ Translation Table BASE1 +> >> + ? ? mcr ? ? p15, 0, r6, c2, c0, 0 ? ? ? ? ? @ Translation Table BASE0 > >> + -> >> + mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register +> >> + ? ? mcr ? ? p15, 0, r10, c1, c0, 1 ? ? ? ? ?@ Auxiliary control register > >> + -> >> + mov r0, #0 -> >> + mcr p15, 0, r0, c8, c7, 0 @ Invalidate I & D TLB +> >> + ? ? mov ? ? r0, #0 +> >> + ? ? mcr ? ? p15, 0, r0, c8, c7, 0 ? ? ? ? ? @ Invalidate I & D TLB > >> + -> >> + mov r0, #0 @ restore copro access -> >> + mcr p15, 0, r11, c1, c0, 2 @ Co-processor access -> >> + mcr p15, 0, r0, c7, c5, 4 +> >> + ? ? mov ? ? r0, #0 ? ? ? ? ? ? ? ? ? ? ? ? ?@ restore copro access +> >> + ? ? mcr ? ? p15, 0, r11, c1, c0, 2 ? ? ? ? ?@ Co-processor access +> >> + ? ? mcr ? ? p15, 0, r0, c7, c5, 4 > >> + -> >> + mcr p15, 0, r12, c10, c2, 0 @ write PRRR -> >> + mcr p15, 0, r3, c10, c2, 1 @ write NMRR +> >> + ? ? mcr ? ? p15, 0, r12, c10, c2, 0 ? ? ? ? @ write PRRR +> >> + ? ? mcr ? ? p15, 0, r3, c10, c2, 1 ? ? ? ? ?@ write NMRR > >> + -> >> + /* Calculate first section address into r8 -> >> + * In Cotex-A8 case, When MMU turn on, MMU is reseted. +> >> + ? ? /* Calculate first section address into r8 +> >> + ? ? ?* In Cotex-A8 case, When MMU turn on, MMU is reseted. > > > > i'd fix this typo. > > -> >> + * So, before call resume_with_mmu, backup originally data. -> >> + */ +> >> + ? ? ?* So, before call resume_with_mmu, backup originally data. +> >> + ? ? */ > >> + -> >> + mov r4, r6 -> >> + mov r4, r4, LSR #14 -> >> + mov r4, r4, LSL #14 +> >> + ? ? mov ? ? r4, r6 +> >> + ? ? mov ? ? r4, r4, LSR #14 +> >> + ? ? mov ? ? r4, r4, LSL #14 > >> + -> >> + /* Load TLB Base address from INFORM0 */ +> >> + ? ? /* Load TLB Base address from INFORM0 */ > > > > do you mean mmu page table? > > -> >> + ldr r11, =0xe010f000 -> >> + ldr r10, [r11, #0] -> >> + mov r10, r10, LSR #18 -> >> + bic r10, r10, #0x3 -> >> + orr r4, r4, r10 +> >> + ? ? ldr ? ? r11, =0xe010f000 +> >> + ? ? ldr ? ? r10, [r11, #0] +> >> + ? ? mov ? ? r10, r10, LSR #18 +> >> + ? ? bic ? ? r10, r10, #0x3 +> >> + ? ? orr ? ? r4, r4, r10 > >> + -> >> + /* calculate mmu list value into r9 */ -> >> + mov r10, r10, LSL #18 -> >> + ldr r5, =0x40e -> >> + orr r10, r10, r5 +> >> + ? ? /* calculate mmu list value into r9 */ +> >> + ? ? mov ? ? r10, r10, LSL #18 +> >> + ? ? ldr ? ? r5, =0x40e +> >> + ? ? orr ? ? r10, r10, r5 > >> + -> >> + /* back up originally data */ +> >> + ? ? /* back up originally data */ > >> + -> >> + ldr r12, [r4] +> >> + ? ? ldr ? ? r12, [r4] > >> + -> >> + /* Added list about mmu */ -> >> + str r10, [r4] +> >> + ? ? /* Added list about mmu */ +> >> + ? ? str ? ? r10, [r4] > > > > > > -> >> + ldr r2, =resume_with_mmu -> >> + mcr p15, 0, r9, c1, c0, 0 @ turn on MMU, etc +> >> + ? ? ldr ? ? r2, =resume_with_mmu +> >> + ? ? mcr ? ? p15, 0, r9, c1, c0, 0 ? ? ? ? ? @ turn on MMU, etc > >> + -> >> + nop -> >> + nop -> >> + nop -> >> + nop -> >> + nop @ second-to-last before mmu +> >> + ? ? nop +> >> + ? ? nop +> >> + ? ? nop +> >> + ? ? nop +> >> + ? ? nop ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? @ second-to-last before mmu > >> + -> >> + mov pc, r2 @ go back to virtual address +> >> + ? ? mov ? ? pc, r2 ? ? ? ? ? ? ? ? ? ? ? ? ?@ go back to virtual address > >> + -> >> + .ltorg +> >> + ? ? .ltorg > >> diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile > >> index 39c242b..d04ae49 100644 > >> --- a/arch/arm/plat-s5p/Makefile > >> +++ b/arch/arm/plat-s5p/Makefile -> >> @@ -18,3 +18,5 @@ obj-y += clock.o -> >> obj-y += irq.o -> >> obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o +> >> @@ -18,3 +18,5 @@ obj-y ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? += clock.o +> >> ?obj-y ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?+= irq.o +> >> ?obj-$(CONFIG_S5P_EXT_INT) ? ?+= irq-eint.o > >> -> >> +obj-$(CONFIG_PM) += pm.o -> >> +obj-$(CONFIG_PM) += irq-pm.o +> >> +obj-$(CONFIG_PM) ? ? ? ? ? ? += pm.o +> >> +obj-$(CONFIG_PM) ? ? ? ? ? ? += irq-pm.o > >> diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h > >> index 3fb3a3a..9ffdd62 100644 > >> --- a/arch/arm/plat-s5p/include/plat/irqs.h > >> +++ b/arch/arm/plat-s5p/include/plat/irqs.h > >> @@ -94,4 +94,6 @@ -> >> ((irq) - S5P_EINT_BASE1) : \ -> >> ((irq) + 16 - S5P_EINT_BASE2)) +> >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ((irq) - S5P_EINT_BASE1) : \ +> >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ((irq) + 16 - S5P_EINT_BASE2)) > >> -> >> +#define IRQ_EINT_BIT(x) EINT_OFFSET(x) +> >> +#define IRQ_EINT_BIT(x) ? ? ? ? ? ? ?EINT_OFFSET(x) > >> + -> >> #endif /* __ASM_PLAT_S5P_IRQS_H */ +> >> ?#endif /* __ASM_PLAT_S5P_IRQS_H */ > >> diff --git a/arch/arm/plat-s5p/irq-pm.c b/arch/arm/plat-s5p/irq-pm.c > >> new file mode 100644 > >> index 0000000..03e83a3 @@ -643,12 +643,12 @@ it isn't as if it fails silently.. > >> +/* linux/arch/arm/plat-s5p/irq-pm.c > >> + * > >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd. -> >> + * http://www.samsung.com +> >> + * ? ? ? ? ? http://www.samsung.com > >> + * > >> + * Based on arch/arm/plat-s3c24xx/irq-pm.c, > >> + * Copyright (c) 2003,2004 Simtec Electronics -> >> + * Ben Dooks <ben@simtec.co.uk> -> >> + * http://armlinux.simtec.co.uk/ +> >> + * ? Ben Dooks <ben@simtec.co.uk> +> >> + * ? http://armlinux.simtec.co.uk/ > >> + * > >> + * This program is free software; you can redistribute it and/or modify > >> + * it under the terms of the GNU General Public License version 2 as @@ -676,79 +676,79 @@ it isn't as if it fails silently.. > >> + * set bit to 1 in allow bitfield to enable the wakeup settings on it > >> +*/ > >> + -> >> +unsigned long s3c_irqwake_intallow = 0x00000006L; -> >> +unsigned long s3c_irqwake_eintallow = 0xffffffffL; +> >> +unsigned long s3c_irqwake_intallow ? = 0x00000006L; +> >> +unsigned long s3c_irqwake_eintallow ?= 0xffffffffL; > >> + > >> +int s3c_irq_wake(unsigned int irqno, unsigned int state) > >> +{ -> >> + unsigned long irqbit; -> >> + -> >> + switch (irqno) { -> >> + case IRQ_RTC_TIC: -> >> + case IRQ_RTC_ALARM: -> >> + irqbit = 1 << (irqno + 1 - IRQ_RTC_ALARM); -> >> + if (!state) -> >> + s3c_irqwake_intmask |= irqbit; -> >> + else -> >> + s3c_irqwake_intmask &= ~irqbit; -> >> + break; -> >> + default: -> >> + return -ENOENT; -> >> + } -> >> + return 0; +> >> + ? ? unsigned long irqbit; +> >> + +> >> + ? ? switch (irqno) { +> >> + ? ? case IRQ_RTC_TIC: +> >> + ? ? case IRQ_RTC_ALARM: +> >> + ? ? ? ? ? ? irqbit = 1 << (irqno + 1 - IRQ_RTC_ALARM); +> >> + ? ? ? ? ? ? if (!state) +> >> + ? ? ? ? ? ? ? ? ? ? s3c_irqwake_intmask |= irqbit; +> >> + ? ? ? ? ? ? else +> >> + ? ? ? ? ? ? ? ? ? ? s3c_irqwake_intmask &= ~irqbit; +> >> + ? ? ? ? ? ? break; +> >> + ? ? default: +> >> + ? ? ? ? ? ? return -ENOENT; +> >> + ? ? } +> >> + ? ? return 0; > >> +} > >> + > >> +/* this lot should be really saved by the IRQ code */ > >> +/* VICXADDRESSXX initilaization to be needed */ > >> +static struct sleep_save irq_save[] = { -> >> + SAVE_ITEM(VA_VIC0 + VIC_INT_SELECT), -> >> + SAVE_ITEM(VA_VIC1 + VIC_INT_SELECT), +> >> + ? ? SAVE_ITEM(VA_VIC0 + VIC_INT_SELECT), +> >> + ? ? SAVE_ITEM(VA_VIC1 + VIC_INT_SELECT), > >> + -> >> + SAVE_ITEM(VA_VIC0 + VIC_INT_ENABLE), -> >> + SAVE_ITEM(VA_VIC1 + VIC_INT_ENABLE), +> >> + ? ? SAVE_ITEM(VA_VIC0 + VIC_INT_ENABLE), +> >> + ? ? SAVE_ITEM(VA_VIC1 + VIC_INT_ENABLE), > >> + -> >> + SAVE_ITEM(VA_VIC0 + VIC_INT_SOFT), -> >> + SAVE_ITEM(VA_VIC1 + VIC_INT_SOFT), +> >> + ? ? SAVE_ITEM(VA_VIC0 + VIC_INT_SOFT), +> >> + ? ? SAVE_ITEM(VA_VIC1 + VIC_INT_SOFT), > > S5PV210 has VIC2,3 as well. Maybe those can be moved from pm.c to here. > > >> +}; > >> + > >> +static struct sleep_save eint_save[] = { -> >> + SAVE_ITEM(S5P_EINT_CON(0)), -> >> + SAVE_ITEM(S5P_EINT_CON(1)), -> >> + SAVE_ITEM(S5P_EINT_CON(2)), -> >> + SAVE_ITEM(S5P_EINT_CON(3)), -> >> + -> >> + SAVE_ITEM(S5P_EINT_FLTCON(0)), -> >> + SAVE_ITEM(S5P_EINT_FLTCON(1)), -> >> + SAVE_ITEM(S5P_EINT_FLTCON(2)), -> >> + SAVE_ITEM(S5P_EINT_FLTCON(3)), -> >> + SAVE_ITEM(S5P_EINT_FLTCON(4)), -> >> + SAVE_ITEM(S5P_EINT_FLTCON(5)), -> >> + SAVE_ITEM(S5P_EINT_FLTCON(6)), -> >> + SAVE_ITEM(S5P_EINT_FLTCON(7)), -> >> + -> >> + SAVE_ITEM(S5P_EINT_MASK(0)), -> >> + SAVE_ITEM(S5P_EINT_MASK(1)), -> >> + SAVE_ITEM(S5P_EINT_MASK(2)), -> >> + SAVE_ITEM(S5P_EINT_MASK(3)), +> >> + ? ? SAVE_ITEM(S5P_EINT_CON(0)), +> >> + ? ? SAVE_ITEM(S5P_EINT_CON(1)), +> >> + ? ? SAVE_ITEM(S5P_EINT_CON(2)), +> >> + ? ? SAVE_ITEM(S5P_EINT_CON(3)), +> >> + +> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(0)), +> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(1)), +> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(2)), +> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(3)), +> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(4)), +> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(5)), +> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(6)), +> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(7)), +> >> + +> >> + ? ? SAVE_ITEM(S5P_EINT_MASK(0)), +> >> + ? ? SAVE_ITEM(S5P_EINT_MASK(1)), +> >> + ? ? SAVE_ITEM(S5P_EINT_MASK(2)), +> >> + ? ? SAVE_ITEM(S5P_EINT_MASK(3)), > >> +}; > >> + > >> +int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state) > >> +{ -> >> + s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save)); -> >> + s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); +> >> + ? ? s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save)); +> >> + ? ? s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); > >> + -> >> + return 0; +> >> + ? ? return 0; > >> +} > >> + > >> +int s3c24xx_irq_resume(struct sys_device *dev) > >> +{ -> >> + s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); -> >> + s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save)); +> >> + ? ? s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); +> >> + ? ? s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save)); > >> + -> >> + return 0; +> >> + ? ? return 0; > >> +} > >> + > >> diff --git a/arch/arm/plat-s5p/pm.c b/arch/arm/plat-s5p/pm.c @@ -760,13 +760,13 @@ it isn't as if it fails silently.. > >> +/* linux/arch/arm/plat-s5p/pm.c > >> + * > >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd. -> >> + * http://www.samsung.com +> >> + * ? ? ? ? ? http://www.samsung.com > >> + * > >> + * S5P Power Manager (Suspend-To-RAM) support > >> + * > >> + * Based on arch/arm/plat-s3c24xx/pm.c > >> + * Copyright (c) 2004,2006 Simtec Electronics -> >> + * Ben Dooks <ben@simtec.co.uk> +> >> + * ? Ben Dooks <ben@simtec.co.uk> > >> + * > >> + * This program is free software; you can redistribute it and/or modify > >> + * it under the terms of the GNU General Public License version 2 as @@ -786,7 +786,7 @@ it isn't as if it fails silently.. > >> + > >> +static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) > >> +{ -> >> + /* nothing here yet */ +> >> + ? ? /* nothing here yet */ > >> +} > >> + > >> +/* s3c_pm_configure_extint @@ -796,17 +796,17 @@ it isn't as if it fails silently.. > >> + > >> +void s3c_pm_configure_extint(void) > >> +{ -> >> + /* nothing here yet */ +> >> + ? ? /* nothing here yet */ > >> +} > >> + > >> +void s3c_pm_restore_core(void) > >> +{ -> >> + /* nothing here yet */ +> >> + ? ? /* nothing here yet */ > >> +} > >> + > >> +void s3c_pm_save_core(void) > >> +{ -> >> + /* nothing here yet */ +> >> + ? ? /* nothing here yet */ > >> +} > >> + > >> diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c @@ -814,23 +814,23 @@ it isn't as if it fails silently.. > >> --- a/arch/arm/plat-samsung/pm-gpio.c > >> +++ b/arch/arm/plat-samsung/pm-gpio.c > >> @@ -192,7 +192,7 @@ struct s3c_gpio_pm s3c_gpio_pm_2bit = { -> >> .resume = s3c_gpio_pm_2bit_resume, -> >> }; +> >> ? ? ? .resume = s3c_gpio_pm_2bit_resume, +> >> ?}; > >> > >> -#ifdef CONFIG_ARCH_S3C64XX > >> +#if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P) -> >> static void s3c_gpio_pm_4bit_save(struct s3c_gpio_chip *chip) -> >> { -> >> chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); +> >> ?static void s3c_gpio_pm_4bit_save(struct s3c_gpio_chip *chip) +> >> ?{ +> >> ? ? ? chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); > >> @@ -302,7 +302,7 @@ struct s3c_gpio_pm s3c_gpio_pm_4bit = { -> >> .save = s3c_gpio_pm_4bit_save, -> >> .resume = s3c_gpio_pm_4bit_resume, -> >> }; +> >> ? ? ? .save ? = s3c_gpio_pm_4bit_save, +> >> ? ? ? .resume = s3c_gpio_pm_4bit_resume, +> >> ?}; > >> -#endif /* CONFIG_ARCH_S3C64XX */ > >> +#endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P */ > >> -> >> /** -> >> * s3c_pm_save_gpio() - save gpio chip data for suspend +> >> ?/** +> >> ? * s3c_pm_save_gpio() - save gpio chip data for suspend > >> -- > >> 1.6.2.5 > >> @@ -840,13 +840,13 @@ it isn't as if it fails silently.. > > -- > > Ben > > -> > Q: What's a light-year? -> > A: One-third less calories than a regular year. +> > Q: ? ? ?What's a light-year? +> > A: ? ? ?One-third less calories than a regular year. > > > > > > _______________________________________________ > > linux-arm-kernel mailing list -> > linux-arm-kernel@lists.infradead.org +> > linux-arm-kernel at lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > > > @@ -861,7 +861,7 @@ it isn't as if it fails silently.. > > _______________________________________________ > linux-arm-kernel mailing list -> linux-arm-kernel@lists.infradead.org +> linux-arm-kernel at lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- diff --git a/a/content_digest b/N1/content_digest index 8048474..e7cdb36 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,15 +1,10 @@ "ref\01275356164-7896-1-git-send-email-kgene.kim@samsung.com\0" "ref\020100601020329.GT4720@trinity.fluff.org\0" "ref\0AANLkTikdkOvvdsQvwuqS9QFv6yIM7LQJb24NrTi-RA-s@mail.gmail.com\0" - "From\0Ben Dooks <ben-linux@fluff.org>\0" - "Subject\0Re: [PATCH v2] ARM: S5PV210: Add Power Management Support\0" + "From\0ben-linux@fluff.org (Ben Dooks)\0" + "Subject\0[PATCH v2] ARM: S5PV210: Add Power Management Support\0" "Date\0Tue, 1 Jun 2010 06:32:55 +0100\0" - "To\0MyungJoo Ham <myungjoo.ham@gmail.com>\0" - "Cc\0Ben Dooks <ben-linux@fluff.org>" - Kukjin Kim <kgene.kim@samsung.com> - linux-samsung-soc@vger.kernel.org - Jongpill Lee <boyko.lee@samsung.com> - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Tue, Jun 01, 2010 at 02:13:18PM +0900, MyungJoo Ham wrote:\n" @@ -35,59 +30,59 @@ "> >>\n" "> >> This patch is based on Linus' master (2.6.35-rc1)\n" "> >>\n" - "> >> \302\240arch/arm/mach-s5pv210/Kconfig \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 | \302\240 \302\2406 +\n" - "> >> \302\240arch/arm/mach-s5pv210/Makefile \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240| \302\240 \302\2401 +\n" - "> >> \302\240arch/arm/mach-s5pv210/include/mach/pm-core.h \302\240 \302\240| \302\240 44 ++++++\n" - "> >> \302\240arch/arm/mach-s5pv210/include/mach/regs-clock.h | \302\240 \302\2405 +-\n" - "> >> \302\240arch/arm/mach-s5pv210/mach-smdkc110.c \302\240 \302\240 \302\240 \302\240 \302\240 | \302\240 \302\2402 +\n" - "> >> \302\240arch/arm/mach-s5pv210/mach-smdkv210.c \302\240 \302\240 \302\240 \302\240 \302\240 | \302\240 \302\2403 +\n" - "> >> \302\240arch/arm/mach-s5pv210/pm.c \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240| \302\240180 +++++++++++++++++++++++\n" - "> >> \302\240arch/arm/mach-s5pv210/sleep.S \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 | \302\240166 +++++++++++++++++++++\n" - "> >> \302\240arch/arm/plat-s5p/Makefile \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240| \302\240 \302\2402 +\n" - "> >> \302\240arch/arm/plat-s5p/include/plat/irqs.h \302\240 \302\240 \302\240 \302\240 \302\240 | \302\240 \302\2402 +\n" - "> >> \302\240arch/arm/plat-s5p/irq-pm.c \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240| \302\240108 ++++++++++++++\n" - "> >> \302\240arch/arm/plat-s5p/pm.c \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240| \302\240 52 +++++++\n" - "> >> \302\240arch/arm/plat-samsung/pm-gpio.c \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 | \302\240 \302\2404 +-\n" - "> >> \302\24013 files changed, 572 insertions(+), 3 deletions(-)\n" - "> >> \302\240create mode 100644 arch/arm/mach-s5pv210/include/mach/pm-core.h\n" - "> >> \302\240create mode 100644 arch/arm/mach-s5pv210/pm.c\n" - "> >> \302\240create mode 100644 arch/arm/mach-s5pv210/sleep.S\n" - "> >> \302\240create mode 100644 arch/arm/plat-s5p/irq-pm.c\n" - "> >> \302\240create mode 100644 arch/arm/plat-s5p/pm.c\n" + "> >> ?arch/arm/mach-s5pv210/Kconfig ? ? ? ? ? ? ? ? ? | ? ?6 +\n" + "> >> ?arch/arm/mach-s5pv210/Makefile ? ? ? ? ? ? ? ? ?| ? ?1 +\n" + "> >> ?arch/arm/mach-s5pv210/include/mach/pm-core.h ? ?| ? 44 ++++++\n" + "> >> ?arch/arm/mach-s5pv210/include/mach/regs-clock.h | ? ?5 +-\n" + "> >> ?arch/arm/mach-s5pv210/mach-smdkc110.c ? ? ? ? ? | ? ?2 +\n" + "> >> ?arch/arm/mach-s5pv210/mach-smdkv210.c ? ? ? ? ? | ? ?3 +\n" + "> >> ?arch/arm/mach-s5pv210/pm.c ? ? ? ? ? ? ? ? ? ? ?| ?180 +++++++++++++++++++++++\n" + "> >> ?arch/arm/mach-s5pv210/sleep.S ? ? ? ? ? ? ? ? ? | ?166 +++++++++++++++++++++\n" + "> >> ?arch/arm/plat-s5p/Makefile ? ? ? ? ? ? ? ? ? ? ?| ? ?2 +\n" + "> >> ?arch/arm/plat-s5p/include/plat/irqs.h ? ? ? ? ? | ? ?2 +\n" + "> >> ?arch/arm/plat-s5p/irq-pm.c ? ? ? ? ? ? ? ? ? ? ?| ?108 ++++++++++++++\n" + "> >> ?arch/arm/plat-s5p/pm.c ? ? ? ? ? ? ? ? ? ? ? ? ?| ? 52 +++++++\n" + "> >> ?arch/arm/plat-samsung/pm-gpio.c ? ? ? ? ? ? ? ? | ? ?4 +-\n" + "> >> ?13 files changed, 572 insertions(+), 3 deletions(-)\n" + "> >> ?create mode 100644 arch/arm/mach-s5pv210/include/mach/pm-core.h\n" + "> >> ?create mode 100644 arch/arm/mach-s5pv210/pm.c\n" + "> >> ?create mode 100644 arch/arm/mach-s5pv210/sleep.S\n" + "> >> ?create mode 100644 arch/arm/plat-s5p/irq-pm.c\n" + "> >> ?create mode 100644 arch/arm/plat-s5p/pm.c\n" "> >>\n" "> >> diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig\n" "> >> index 0761eac..86cca1b 100644\n" "> >> --- a/arch/arm/mach-s5pv210/Kconfig\n" "> >> +++ b/arch/arm/mach-s5pv210/Kconfig\n" "> >> @@ -14,6 +14,7 @@ config CPU_S5PV210\n" - "> >> \302\240 \302\240 \302\240 select PLAT_S5P\n" - "> >> \302\240 \302\240 \302\240 select S3C_PL330_DMA\n" - "> >> \302\240 \302\240 \302\240 select S5P_EXT_INT\n" - "> >> + \302\240 \302\240 select S5PV210_PM if PM\n" - "> >> \302\240 \302\240 \302\240 help\n" - "> >> \302\240 \302\240 \302\240 \302\240 Enable S5PV210 CPU support\n" + "> >> ? ? ? select PLAT_S5P\n" + "> >> ? ? ? select S3C_PL330_DMA\n" + "> >> ? ? ? select S5P_EXT_INT\n" + "> >> + ? ? select S5PV210_PM if PM\n" + "> >> ? ? ? help\n" + "> >> ? ? ? ? Enable S5PV210 CPU support\n" "> >>\n" "> >> @@ -88,4 +89,9 @@ config MACH_SMDKC110\n" - "> >> \302\240 \302\240 \302\240 \302\240 Machine support for Samsung SMDKC110\n" - "> >> \302\240 \302\240 \302\240 \302\240 S5PC110(MCP) is one of package option of S5PV210\n" + "> >> ? ? ? ? Machine support for Samsung SMDKC110\n" + "> >> ? ? ? ? S5PC110(MCP) is one of package option of S5PV210\n" "> >>\n" "> >> +config S5PV210_PM\n" - "> >> + \302\240 \302\240 bool\n" - "> >> + \302\240 \302\240 help\n" - "> >> + \302\240 \302\240 \302\240 Power Management code common to S5PV210\n" + "> >> + ? ? bool\n" + "> >> + ? ? help\n" + "> >> + ? ? ? Power Management code common to S5PV210\n" "> >> +\n" - "> >> \302\240endif\n" + "> >> ?endif\n" "> >> diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile\n" "> >> index 30be9a6..59382ec 100644\n" "> >> --- a/arch/arm/mach-s5pv210/Makefile\n" "> >> +++ b/arch/arm/mach-s5pv210/Makefile\n" - "> >> @@ -14,6 +14,7 @@ obj- \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240:=\n" + "> >> @@ -14,6 +14,7 @@ obj- ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?:=\n" "> >>\n" - "> >> \302\240obj-$(CONFIG_CPU_S5PV210) \302\240 \302\240+= cpu.o init.o clock.o dma.o gpiolib.o\n" - "> >> \302\240obj-$(CONFIG_CPU_S5PV210) \302\240 \302\240+= setup-i2c0.o\n" - "> >> +obj-$(CONFIG_S5PV210_PM) \302\240 \302\240 += pm.o sleep.o\n" + "> >> ?obj-$(CONFIG_CPU_S5PV210) ? ?+= cpu.o init.o clock.o dma.o gpiolib.o\n" + "> >> ?obj-$(CONFIG_CPU_S5PV210) ? ?+= setup-i2c0.o\n" + "> >> +obj-$(CONFIG_S5PV210_PM) ? ? += pm.o sleep.o\n" "> >>\n" - "> >> \302\240# machine support\n" + "> >> ?# machine support\n" "> >>\n" "> >> diff --git a/arch/arm/mach-s5pv210/include/mach/pm-core.h b/arch/arm/mach-s5pv210/include/mach/pm-core.h\n" "> >> new file mode 100644\n" @@ -98,12 +93,12 @@ "> >> +/* linux/arch/arm/mach-s5pv210/include/mach/pm-core.h\n" "> >> + *\n" "> >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.\n" - "> >> + * \302\240 \302\240 \302\240 \302\240 \302\240 http://www.samsung.com\n" + "> >> + * ? ? ? ? ? http://www.samsung.com\n" "> >> + *\n" "> >> + * Based on arch/arm/mach-s3c2410/include/mach/pm-core.h,\n" "> >> + * Copyright 2008 Simtec Electronics\n" - "> >> + * \302\240 \302\240 \302\240Ben Dooks <ben@simtec.co.uk>\n" - "> >> + * \302\240 \302\240 \302\240http://armlinux.simtec.co.uk/\n" + "> >> + * ? ? ?Ben Dooks <ben@simtec.co.uk>\n" + "> >> + * ? ? ?http://armlinux.simtec.co.uk/\n" "> >> + *\n" "> >> + * S5PV210 - PM core support for arch/arm/plat-s5p/pm.c\n" "> >> + *\n" @@ -114,29 +109,29 @@ "> >> +\n" "> >> +static inline void s3c_pm_debug_init_uart(void)\n" "> >> +{\n" - "> >> + \302\240 \302\240 /* nothing here yet */\n" + "> >> + ? ? /* nothing here yet */\n" "> >> +}\n" "> >> +\n" "> >> +static inline void s3c_pm_arch_prepare_irqs(void)\n" "> >> +{\n" - "> >> + \302\240 \302\240 __raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK);\n" - "> >> + \302\240 \302\240 __raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK);\n" + "> >> + ? ? __raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK);\n" + "> >> + ? ? __raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK);\n" "> >> +}\n" "> >> +\n" "> >> +static inline void s3c_pm_arch_stop_clocks(void)\n" "> >> +{\n" - "> >> + \302\240 \302\240 /* nothing here yet */\n" + "> >> + ? ? /* nothing here yet */\n" "> >> +}\n" "> >> +\n" "> >> +static inline void s3c_pm_arch_show_resume_irqs(void)\n" "> >> +{\n" - "> >> + \302\240 \302\240 /* nothing here yet */\n" + "> >> + ? ? /* nothing here yet */\n" "> >> +}\n" "> >> +\n" "> >> +static inline void s3c_pm_arch_update_uart(void __iomem *regs,\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240struct pm_uart_save *save)\n" + "> >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?struct pm_uart_save *save)\n" "> >> +{\n" - "> >> + \302\240 \302\240 /* nothing here yet */\n" + "> >> + ? ? /* nothing here yet */\n" "> >> +}\n" "> >> +\n" "> >> diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h\n" @@ -144,59 +139,59 @@ "> >> --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h\n" "> >> +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h\n" "> >> @@ -157,8 +157,11 @@\n" - "> >> \302\240#define S5P_SLEEP_CFG_USBOSC_EN \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(1 << 1)\n" + "> >> ?#define S5P_SLEEP_CFG_USBOSC_EN ? ? ? ? ? ? ?(1 << 1)\n" "> >>\n" - "> >> \302\240/* OTHERS Resgister */\n" - "> >> +#define S5P_OTHERS_RET_IO \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(1 << 31)\n" - "> >> +#define S5P_OTHERS_RET_CF \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(1 << 30)\n" - "> >> +#define S5P_OTHERS_RET_MMC \302\240 \302\240 \302\240 \302\240 \302\240 (1 << 29)\n" - "> >> +#define S5P_OTHERS_RET_UART \302\240 \302\240 \302\240 \302\240 \302\240(1 << 28)\n" - "> >> \302\240#define S5P_OTHERS_USB_SIG_MASK \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(1 << 16)\n" - "> >> -#define S5P_OTHERS_MIPI_DPHY_EN \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(1 << 28)\n" + "> >> ?/* OTHERS Resgister */\n" + "> >> +#define S5P_OTHERS_RET_IO ? ? ? ? ? ?(1 << 31)\n" + "> >> +#define S5P_OTHERS_RET_CF ? ? ? ? ? ?(1 << 30)\n" + "> >> +#define S5P_OTHERS_RET_MMC ? ? ? ? ? (1 << 29)\n" + "> >> +#define S5P_OTHERS_RET_UART ? ? ? ? ?(1 << 28)\n" + "> >> ?#define S5P_OTHERS_USB_SIG_MASK ? ? ? ? ? ? ?(1 << 16)\n" + "> >> -#define S5P_OTHERS_MIPI_DPHY_EN ? ? ? ? ? ? ?(1 << 28)\n" "> >>\n" - "> >> \302\240/* MIPI */\n" - "> >> \302\240#define S5P_MIPI_DPHY_EN \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 (3)\n" + "> >> ?/* MIPI */\n" + "> >> ?#define S5P_MIPI_DPHY_EN ? ? ? ? ? ? (3)\n" "> >> diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c\n" "> >> index 4c8903c..ebb4832 100644\n" "> >> --- a/arch/arm/mach-s5pv210/mach-smdkc110.c\n" "> >> +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c\n" "> >> @@ -25,6 +25,7 @@\n" - "> >> \302\240#include <plat/s5pv210.h>\n" - "> >> \302\240#include <plat/devs.h>\n" - "> >> \302\240#include <plat/cpu.h>\n" + "> >> ?#include <plat/s5pv210.h>\n" + "> >> ?#include <plat/devs.h>\n" + "> >> ?#include <plat/cpu.h>\n" "> >> +#include <plat/pm.h>\n" "> >>\n" - "> >> \302\240/* Following are default values for UCON, ULCON and UFCON UART registers */\n" - "> >> \302\240#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \302\240 \302\240 \302\240 \302\240\\\n" + "> >> ?/* Following are default values for UCON, ULCON and UFCON UART registers */\n" + "> >> ?#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | ? ? ? ?\\\n" "> >> @@ -86,6 +87,7 @@ static void __init smdkc110_map_io(void)\n" "> >>\n" - "> >> \302\240static void __init smdkc110_machine_init(void)\n" - "> >> \302\240{\n" - "> >> + \302\240 \302\240 s3c_pm_init();\n" - "> >> \302\240 \302\240 \302\240 platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));\n" - "> >> \302\240}\n" + "> >> ?static void __init smdkc110_machine_init(void)\n" + "> >> ?{\n" + "> >> + ? ? s3c_pm_init();\n" + "> >> ? ? ? platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));\n" + "> >> ?}\n" "> >>\n" "> >> diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c\n" "> >> index 0d46279..ba30b5d 100644\n" "> >> --- a/arch/arm/mach-s5pv210/mach-smdkv210.c\n" "> >> +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c\n" "> >> @@ -27,6 +27,7 @@\n" - "> >> \302\240#include <plat/cpu.h>\n" - "> >> \302\240#include <plat/adc.h>\n" - "> >> \302\240#include <plat/ts.h>\n" + "> >> ?#include <plat/cpu.h>\n" + "> >> ?#include <plat/adc.h>\n" + "> >> ?#include <plat/ts.h>\n" "> >> +#include <plat/pm.h>\n" "> >>\n" - "> >> \302\240/* Following are default values for UCON, ULCON and UFCON UART registers */\n" - "> >> \302\240#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \302\240 \302\240 \302\240 \302\240\\\n" + "> >> ?/* Following are default values for UCON, ULCON and UFCON UART registers */\n" + "> >> ?#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | ? ? ? ?\\\n" "> >> @@ -96,6 +97,8 @@ static void __init smdkv210_map_io(void)\n" "> >>\n" - "> >> \302\240static void __init smdkv210_machine_init(void)\n" - "> >> \302\240{\n" - "> >> + \302\240 \302\240 s3c_pm_init();\n" + "> >> ?static void __init smdkv210_machine_init(void)\n" + "> >> ?{\n" + "> >> + ? ? s3c_pm_init();\n" "> >> +\n" - "> >> \302\240 \302\240 \302\240 s3c24xx_ts_set_platdata(&s3c_ts_platform);\n" - "> >> \302\240 \302\240 \302\240 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));\n" - "> >> \302\240}\n" + "> >> ? ? ? s3c24xx_ts_set_platdata(&s3c_ts_platform);\n" + "> >> ? ? ? platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));\n" + "> >> ?}\n" "> >> diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c\n" "> >> new file mode 100644\n" "> >> index 0000000..0690332\n" @@ -206,13 +201,13 @@ "> >> +/* linux/arch/arm/mach-s5pv210/pm.c\n" "> >> + *\n" "> >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.\n" - "> >> + * \302\240 \302\240 \302\240 \302\240 \302\240 http://www.samsung.com\n" + "> >> + * ? ? ? ? ? http://www.samsung.com\n" "> >> + *\n" "> >> + * S5PV210 - Power Management support\n" "> >> + *\n" "> >> + * Based on arch/arm/mach-s3c2410/pm.c\n" "> >> + * Copyright (c) 2006 Simtec Electronics\n" - "> >> + * \302\240 Ben Dooks <ben@simtec.co.uk>\n" + "> >> + * ? Ben Dooks <ben@simtec.co.uk>\n" "> >> + *\n" "> >> + * This program is free software; you can redistribute it and/or modify\n" "> >> + * it under the terms of the GNU General Public License version 2 as\n" @@ -231,73 +226,73 @@ "> >> +#include <mach/regs-clock.h>\n" "> >> +\n" "> >> +static struct sleep_save s5pv210_core_save[] = {\n" - "> >> + \302\240 \302\240 /* Clock source */\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_SRC0),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_SRC1),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_SRC2),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_SRC3),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_SRC4),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_SRC5),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_SRC6),\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* Clock source Mask */\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_SRC_MASK0),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_SRC_MASK1),\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* Clock Divider */\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_DIV0),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_DIV1),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_DIV2),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_DIV3),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_DIV4),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_DIV5),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_DIV6),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_DIV7),\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* Clock Main Gate */\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_MAIN0),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_MAIN1),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_MAIN2),\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* Clock source Peri Gate */\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_PERI0),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_PERI1),\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* Clock source SCLK Gate */\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_SCLK0),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_SCLK1),\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* Clock IP Clock gate */\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_IP0),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_IP1),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_IP2),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_IP3),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_IP4),\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* Clock Blcok and Bus gate */\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_BLOCK),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLKGATE_BUS0),\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* Clock ETC */\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_CLK_OUT),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_MDNIE_SEL),\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* PWM Register */\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S3C2410_TCFG0),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S3C2410_TCFG1),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S3C64XX_TINT_CSTAT),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S3C2410_TCON),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S3C2410_TCNTB(0)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S3C2410_TCMPB(0)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S3C2410_TCNTO(0)),\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* VIC 2 and 3*/\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC2 + VIC_INT_SELECT),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC3 + VIC_INT_SELECT),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC2 + VIC_INT_ENABLE),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC3 + VIC_INT_ENABLE),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC2 + VIC_INT_SOFT),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC3 + VIC_INT_SOFT),\n" + "> >> + ? ? /* Clock source */\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_SRC0),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_SRC1),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_SRC2),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_SRC3),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_SRC4),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_SRC5),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_SRC6),\n" + "> >> +\n" + "> >> + ? ? /* Clock source Mask */\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_SRC_MASK0),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_SRC_MASK1),\n" + "> >> +\n" + "> >> + ? ? /* Clock Divider */\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_DIV0),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_DIV1),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_DIV2),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_DIV3),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_DIV4),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_DIV5),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_DIV6),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_DIV7),\n" + "> >> +\n" + "> >> + ? ? /* Clock Main Gate */\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_MAIN0),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_MAIN1),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_MAIN2),\n" + "> >> +\n" + "> >> + ? ? /* Clock source Peri Gate */\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_PERI0),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_PERI1),\n" + "> >> +\n" + "> >> + ? ? /* Clock source SCLK Gate */\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_SCLK0),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_SCLK1),\n" + "> >> +\n" + "> >> + ? ? /* Clock IP Clock gate */\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_IP0),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_IP1),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_IP2),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_IP3),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_IP4),\n" + "> >> +\n" + "> >> + ? ? /* Clock Blcok and Bus gate */\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_BLOCK),\n" + "> >> + ? ? SAVE_ITEM(S5P_CLKGATE_BUS0),\n" + "> >> +\n" + "> >> + ? ? /* Clock ETC */\n" + "> >> + ? ? SAVE_ITEM(S5P_CLK_OUT),\n" + "> >> + ? ? SAVE_ITEM(S5P_MDNIE_SEL),\n" + "> >> +\n" + "> >> + ? ? /* PWM Register */\n" + "> >> + ? ? SAVE_ITEM(S3C2410_TCFG0),\n" + "> >> + ? ? SAVE_ITEM(S3C2410_TCFG1),\n" + "> >> + ? ? SAVE_ITEM(S3C64XX_TINT_CSTAT),\n" + "> >> + ? ? SAVE_ITEM(S3C2410_TCON),\n" + "> >> + ? ? SAVE_ITEM(S3C2410_TCNTB(0)),\n" + "> >> + ? ? SAVE_ITEM(S3C2410_TCMPB(0)),\n" + "> >> + ? ? SAVE_ITEM(S3C2410_TCNTO(0)),\n" + "> >> +\n" + "> >> + ? ? /* VIC 2 and 3*/\n" + "> >> + ? ? SAVE_ITEM(VA_VIC2 + VIC_INT_SELECT),\n" + "> >> + ? ? SAVE_ITEM(VA_VIC3 + VIC_INT_SELECT),\n" + "> >> + ? ? SAVE_ITEM(VA_VIC2 + VIC_INT_ENABLE),\n" + "> >> + ? ? SAVE_ITEM(VA_VIC3 + VIC_INT_ENABLE),\n" + "> >> + ? ? SAVE_ITEM(VA_VIC2 + VIC_INT_SOFT),\n" + "> >> + ? ? SAVE_ITEM(VA_VIC3 + VIC_INT_SOFT),\n" "> >\n" "> > doesn't the vic driver do this for you? if not, then would be better\n" "> > to change the vic to fix this.\n" @@ -332,19 +327,19 @@ "> >> +\n" "> >> +void s5pv210_cpu_suspend(void)\n" "> >> +{\n" - "> >> + \302\240 \302\240 unsigned long tmp;\n" + "> >> + ? ? unsigned long tmp;\n" "> >> +\n" - "> >> + \302\240 \302\240 /* issue the standby signal into the pm unit. Note, we\n" - "> >> + \302\240 \302\240 \302\240* issue a write-buffer drain just in case */\n" + "> >> + ? ? /* issue the standby signal into the pm unit. Note, we\n" + "> >> + ? ? ?* issue a write-buffer drain just in case */\n" "> >> +\n" - "> >> + \302\240 \302\240 tmp = 0;\n" + "> >> + ? ? tmp = 0;\n" "> >> +\n" - "> >> + \302\240 \302\240 asm(\"b 1f\\n\\t\"\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \".align 5\\n\\t\"\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \"1:\\n\\t\"\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \"mcr p15, 0, %0, c7, c10, 5\\n\\t\"\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \"mcr p15, 0, %0, c7, c10, 4\\n\\t\"\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \".word 0xe320f003\" : : \"r\" (tmp));\n" + "> >> + ? ? asm(\"b 1f\\n\\t\"\n" + "> >> + ? ? ? ? \".align 5\\n\\t\"\n" + "> >> + ? ? ? ? \"1:\\n\\t\"\n" + "> >> + ? ? ? ? \"mcr p15, 0, %0, c7, c10, 5\\n\\t\"\n" + "> >> + ? ? ? ? \"mcr p15, 0, %0, c7, c10, 4\\n\\t\"\n" + "> >> + ? ? ? ? \".word 0xe320f003\" : : \"r\" (tmp));\n" "> >\n" "> > why .word? if there's a compiler problem then make a comment about\n" "> > what instruction is being synthesised and why.\n" @@ -352,36 +347,36 @@ "> \".word 0xe320f003\" may be replaced by \"wfi\". (wait-for-interrupt)\n" "> \n" "> >\n" - "> >> + \302\240 \302\240 /* we should never get past here */\n" - "> >> + \302\240 \302\240 panic(\"sleep resumed to originator?\");\n" + "> >> + ? ? /* we should never get past here */\n" + "> >> + ? ? panic(\"sleep resumed to originator?\");\n" "> >> +}\n" "> >> +\n" "> >> +static void s5pv210_pm_prepare(void)\n" "> >> +{\n" - "> >> + \302\240 \302\240 unsigned int tmp;\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* ensure at least INFORM0 has the resume address */\n" - "> >> + \302\240 \302\240 __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);\n" - "> >> +\n" - "> >> + \302\240 \302\240 tmp = __raw_readl(S5P_SLEEP_CFG);\n" - "> >> + \302\240 \302\240 tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);\n" - "> >> + \302\240 \302\240 __raw_writel(tmp, S5P_SLEEP_CFG);\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* WFI for SLEEP mode configuration by SYSCON */\n" - "> >> + \302\240 \302\240 tmp = __raw_readl(S5P_PWR_CFG);\n" - "> >> + \302\240 \302\240 tmp &= S5P_CFG_WFI_CLEAN;\n" - "> >> + \302\240 \302\240 tmp |= S5P_CFG_WFI_SLEEP;\n" - "> >> + \302\240 \302\240 __raw_writel(tmp, S5P_PWR_CFG);\n" - "> >> +\n" - "> >> + \302\240 \302\240 /* SYSCON interrupt handling disable */\n" - "> >> + \302\240 \302\240 tmp = __raw_readl(S5P_OTHERS);\n" - "> >> + \302\240 \302\240 tmp |= S5P_OTHER_SYSC_INTOFF;\n" - "> >> + \302\240 \302\240 __raw_writel(tmp, S5P_OTHERS);\n" - "> >> +\n" - "> >> + \302\240 \302\240 __raw_writel(0xffffffff, (VA_VIC0 + VIC_INT_ENABLE_CLEAR));\n" - "> >> + \302\240 \302\240 __raw_writel(0xffffffff, (VA_VIC1 + VIC_INT_ENABLE_CLEAR));\n" - "> >> + \302\240 \302\240 __raw_writel(0xffffffff, (VA_VIC2 + VIC_INT_ENABLE_CLEAR));\n" - "> >> + \302\240 \302\240 __raw_writel(0xffffffff, (VA_VIC3 + VIC_INT_ENABLE_CLEAR));\n" + "> >> + ? ? unsigned int tmp;\n" + "> >> +\n" + "> >> + ? ? /* ensure at least INFORM0 has the resume address */\n" + "> >> + ? ? __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);\n" + "> >> +\n" + "> >> + ? ? tmp = __raw_readl(S5P_SLEEP_CFG);\n" + "> >> + ? ? tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);\n" + "> >> + ? ? __raw_writel(tmp, S5P_SLEEP_CFG);\n" + "> >> +\n" + "> >> + ? ? /* WFI for SLEEP mode configuration by SYSCON */\n" + "> >> + ? ? tmp = __raw_readl(S5P_PWR_CFG);\n" + "> >> + ? ? tmp &= S5P_CFG_WFI_CLEAN;\n" + "> >> + ? ? tmp |= S5P_CFG_WFI_SLEEP;\n" + "> >> + ? ? __raw_writel(tmp, S5P_PWR_CFG);\n" + "> >> +\n" + "> >> + ? ? /* SYSCON interrupt handling disable */\n" + "> >> + ? ? tmp = __raw_readl(S5P_OTHERS);\n" + "> >> + ? ? tmp |= S5P_OTHER_SYSC_INTOFF;\n" + "> >> + ? ? __raw_writel(tmp, S5P_OTHERS);\n" + "> >> +\n" + "> >> + ? ? __raw_writel(0xffffffff, (VA_VIC0 + VIC_INT_ENABLE_CLEAR));\n" + "> >> + ? ? __raw_writel(0xffffffff, (VA_VIC1 + VIC_INT_ENABLE_CLEAR));\n" + "> >> + ? ? __raw_writel(0xffffffff, (VA_VIC2 + VIC_INT_ENABLE_CLEAR));\n" + "> >> + ? ? __raw_writel(0xffffffff, (VA_VIC3 + VIC_INT_ENABLE_CLEAR));\n" "> \n" "> It appears to be omitting VIC_INT_SOFT_CLEAR. I'm not sure whether\n" "> this is also required as VIC_INT_ENABLE_CLEAR does; however, we've\n" @@ -398,29 +393,29 @@ "> S5PC110.\n" "> \n" "> >> +\n" - "> >> + \302\240 \302\240 s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));\n" + "> >> + ? ? s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));\n" "> >> +}\n" "> >> +\n" "> >> +static int s5pv210_pm_add(struct sys_device *sysdev)\n" "> >> +{\n" - "> >> + \302\240 \302\240 pm_cpu_prep = s5pv210_pm_prepare;\n" - "> >> + \302\240 \302\240 pm_cpu_sleep = s5pv210_cpu_suspend;\n" + "> >> + ? ? pm_cpu_prep = s5pv210_pm_prepare;\n" + "> >> + ? ? pm_cpu_sleep = s5pv210_cpu_suspend;\n" "> >> +\n" - "> >> + \302\240 \302\240 return 0;\n" + "> >> + ? ? return 0;\n" "> >> +}\n" "> >> +\n" "> >> +static int s5pv210_pm_resume(struct sys_device *dev)\n" "> >> +{\n" - "> >> + \302\240 \302\240 u32 tmp;\n" + "> >> + ? ? u32 tmp;\n" "> >> +\n" - "> >> + \302\240 \302\240 tmp = __raw_readl(S5P_OTHERS);\n" - "> >> + \302\240 \302\240 tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF | \\\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART);\n" - "> >> + \302\240 \302\240 __raw_writel(tmp , S5P_OTHERS);\n" + "> >> + ? ? tmp = __raw_readl(S5P_OTHERS);\n" + "> >> + ? ? tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF | \\\n" + "> >> + ? ? ? ? ? ? S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART);\n" + "> >> + ? ? __raw_writel(tmp , S5P_OTHERS);\n" "> >> +\n" - "> >> + \302\240 \302\240 s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));\n" + "> >> + ? ? s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));\n" "> >> +\n" - "> >> + \302\240 \302\240 return 0;\n" + "> >> + ? ? return 0;\n" "> >> +}\n" "> \n" "> I don't know how may \"printk\"s exist after s3c_pm_enter is returned\n" @@ -434,13 +429,13 @@ "> \n" "> >> +\n" "> >> +static struct sysdev_driver s5pv210_pm_driver = {\n" - "> >> + \302\240 \302\240 .add \302\240 \302\240 \302\240 \302\240 \302\240 \302\240= s5pv210_pm_add,\n" - "> >> + \302\240 \302\240 .resume \302\240 \302\240 \302\240 \302\240 = s5pv210_pm_resume,\n" + "> >> + ? ? .add ? ? ? ? ? ?= s5pv210_pm_add,\n" + "> >> + ? ? .resume ? ? ? ? = s5pv210_pm_resume,\n" "> >> +};\n" "> >> +\n" "> >> +static __init int s5pv210_pm_drvinit(void)\n" "> >> +{\n" - "> >> + \302\240 \302\240 return sysdev_driver_register(&s5pv210_sysclass, &s5pv210_pm_driver);\n" + "> >> + ? ? return sysdev_driver_register(&s5pv210_sysclass, &s5pv210_pm_driver);\n" "> >> +}\n" "> >> +arch_initcall(s5pv210_pm_drvinit);\n" "> >> diff --git a/arch/arm/mach-s5pv210/sleep.S b/arch/arm/mach-s5pv210/sleep.S\n" @@ -452,16 +447,16 @@ "> >> +/* linux/arch/arm/mach-s5pv210/sleep.S\n" "> >> + *\n" "> >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.\n" - "> >> + * \302\240 \302\240 \302\240 \302\240 \302\240 http://www.samsung.com\n" + "> >> + * ? ? ? ? ? http://www.samsung.com\n" "> >> + *\n" "> >> + * S5PV210 power Manager (Suspend-To-RAM) support\n" "> >> + *\n" "> >> + * Based on S3C2410 sleep code by:\n" - "> >> + * \302\240 Ben Dooks, (c) 2004 Simtec Electronics\n" + "> >> + * ? Ben Dooks, (c) 2004 Simtec Electronics\n" "> >> + *\n" "> >> + * Based on PXA/SA1100 sleep code by:\n" - "> >> + * \302\240 Nicolas Pitre, (c) 2002 Monta Vista Software Inc\n" - "> >> + * \302\240 Cliff Brake, (c) 2001\n" + "> >> + * ? Nicolas Pitre, (c) 2002 Monta Vista Software Inc\n" + "> >> + * ? Cliff Brake, (c) 2001\n" "> >> + *\n" "> >> + * This program is free software; you can redistribute it and/or modify\n" "> >> + * it under the terms of the GNU General Public License as published by\n" @@ -470,184 +465,184 @@ "> >> + *\n" "> >> + * This program is distributed in the hope that it will be useful,\n" "> >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n" - "> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. \302\240See the\n" + "> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the\n" "> >> + * GNU General Public License for more details.\n" "> >> + *\n" "> >> + * You should have received a copy of the GNU General Public License\n" "> >> + * along with this program; if not, write to the Free Software\n" - "> >> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA \302\24002111-1307 \302\240USA\n" + "> >> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA ?02111-1307 ?USA\n" "> >> +*/\n" "> >> +\n" "> >> +#include <linux/linkage.h>\n" "> >> +#include <asm/assembler.h>\n" "> >> +#include <asm/memory.h>\n" "> >> +\n" - "> >> + \302\240 \302\240 .text\n" + "> >> + ? ? .text\n" "> >> +\n" - "> >> + \302\240 \302\240 /* s3c_cpu_save\n" - "> >> + \302\240 \302\240 \302\240*\n" - "> >> + \302\240 \302\240 \302\240* entry:\n" - "> >> + \302\240 \302\240 \302\240* \302\240 \302\240 \302\240r0 = save address (virtual addr of s3c_sleep_save_phys)\n" - "> >> + \302\240 \302\240 */\n" + "> >> + ? ? /* s3c_cpu_save\n" + "> >> + ? ? ?*\n" + "> >> + ? ? ?* entry:\n" + "> >> + ? ? ?* ? ? ?r0 = save address (virtual addr of s3c_sleep_save_phys)\n" + "> >> + ? ? */\n" "> >> +\n" "> >> +ENTRY(s3c_cpu_save)\n" "> >> +\n" - "> >> + \302\240 \302\240 stmfd \302\240 sp!, { r3 - r12, lr }\n" + "> >> + ? ? stmfd ? sp!, { r3 - r12, lr }\n" "> >> +\n" - "> >> + \302\240 \302\240 mrc \302\240 \302\240 p15, 0, r4, c13, c0, 0 \302\240@ FCSE/PID\n" - "> >> + \302\240 \302\240 mrc \302\240 \302\240 p15, 0, r5, c3, c0, 0 \302\240 @ Domain ID\n" - "> >> + \302\240 \302\240 mrc \302\240 \302\240 p15, 0, r6, c2, c0, 0 \302\240 @ Translation Table BASE0\n" - "> >> + \302\240 \302\240 mrc \302\240 \302\240 p15, 0, r7, c2, c0, 1 \302\240 @ Translation Table BASE1\n" - "> >> + \302\240 \302\240 mrc \302\240 \302\240 p15, 0, r8, c2, c0, 2 \302\240 @ Translation Table Control\n" - "> >> + \302\240 \302\240 mrc \302\240 \302\240 p15, 0, r9, c1, c0, 0 \302\240 @ Control register\n" - "> >> + \302\240 \302\240 mrc \302\240 \302\240 p15, 0, r10, c1, c0, 1 \302\240@ Auxiliary control register\n" - "> >> + \302\240 \302\240 mrc \302\240 \302\240 p15, 0, r11, c1, c0, 2 \302\240@ Co-processor access controls\n" - "> >> + \302\240 \302\240 mrc \302\240 \302\240 p15, 0, r12, c10, c2, 0 @ Read PRRR\n" - "> >> + \302\240 \302\240 mrc \302\240 \302\240 p15, 0, r3, c10, c2, 1 \302\240@ READ NMRR\n" + "> >> + ? ? mrc ? ? p15, 0, r4, c13, c0, 0 ?@ FCSE/PID\n" + "> >> + ? ? mrc ? ? p15, 0, r5, c3, c0, 0 ? @ Domain ID\n" + "> >> + ? ? mrc ? ? p15, 0, r6, c2, c0, 0 ? @ Translation Table BASE0\n" + "> >> + ? ? mrc ? ? p15, 0, r7, c2, c0, 1 ? @ Translation Table BASE1\n" + "> >> + ? ? mrc ? ? p15, 0, r8, c2, c0, 2 ? @ Translation Table Control\n" + "> >> + ? ? mrc ? ? p15, 0, r9, c1, c0, 0 ? @ Control register\n" + "> >> + ? ? mrc ? ? p15, 0, r10, c1, c0, 1 ?@ Auxiliary control register\n" + "> >> + ? ? mrc ? ? p15, 0, r11, c1, c0, 2 ?@ Co-processor access controls\n" + "> >> + ? ? mrc ? ? p15, 0, r12, c10, c2, 0 @ Read PRRR\n" + "> >> + ? ? mrc ? ? p15, 0, r3, c10, c2, 1 ?@ READ NMRR\n" "> >> +\n" - "> >> + \302\240 \302\240 stmia \302\240 r0, { r3 - r13 }\n" + "> >> + ? ? stmia ? r0, { r3 - r13 }\n" "> >> +\n" - "> >> + \302\240 \302\240 bl \302\240 \302\240 \302\240s3c_pm_cb_flushcache\n" + "> >> + ? ? bl ? ? ?s3c_pm_cb_flushcache\n" "> >> +\n" - "> >> + \302\240 \302\240 ldr \302\240 \302\240 r0, =pm_cpu_sleep\n" - "> >> + \302\240 \302\240 ldr \302\240 \302\240 r0, [ r0 ]\n" - "> >> + \302\240 \302\240 mov \302\240 \302\240 pc, r0\n" + "> >> + ? ? ldr ? ? r0, =pm_cpu_sleep\n" + "> >> + ? ? ldr ? ? r0, [ r0 ]\n" + "> >> + ? ? mov ? ? pc, r0\n" "> >> +\n" "> >> +resume_with_mmu:\n" - "> >> + \302\240 \302\240 /* delete added mmu table list */\n" + "> >> + ? ? /* delete added mmu table list */\n" "> >\n" "> > hmm, where is this being added?\n" "> > also, a better description on what it is doing would be better.\n" "> >\n" - "> >> + \302\240 \302\240 ldr \302\240 \302\240 r9 , =(PAGE_OFFSET - PHYS_OFFSET)\n" - "> >> + \302\240 \302\240 add \302\240 \302\240 r4, r4, r9\n" - "> >> + \302\240 \302\240 str \302\240 \302\240 r12, [r4]\n" + "> >> + ? ? ldr ? ? r9 , =(PAGE_OFFSET - PHYS_OFFSET)\n" + "> >> + ? ? add ? ? r4, r4, r9\n" + "> >> + ? ? str ? ? r12, [r4]\n" "> >> +\n" - "> >> + \302\240 \302\240 ldmfd \302\240 sp!, { r3 - r12, pc }\n" + "> >> + ? ? ldmfd ? sp!, { r3 - r12, pc }\n" "> >> +\n" - "> >> + \302\240 \302\240 .ltorg\n" + "> >> + ? ? .ltorg\n" "> >> +\n" - "> >> + \302\240 \302\240 .data\n" + "> >> + ? ? .data\n" "> >> +\n" - "> >> + \302\240 \302\240 .global s3c_sleep_save_phys\n" + "> >> + ? ? .global s3c_sleep_save_phys\n" "> >> +s3c_sleep_save_phys:\n" - "> >> + \302\240 \302\240 .word \302\240 0\n" + "> >> + ? ? .word ? 0\n" "> >> +\n" - "> >> + \302\240 \302\240 /* sleep magic, to allow the bootloader to check for an valid\n" - "> >> + \302\240 \302\240 \302\240* image to resume to. Must be the first word before the\n" - "> >> + \302\240 \302\240 \302\240* s3c_cpu_resume entry.\n" - "> >> + \302\240 \302\240 */\n" + "> >> + ? ? /* sleep magic, to allow the bootloader to check for an valid\n" + "> >> + ? ? ?* image to resume to. Must be the first word before the\n" + "> >> + ? ? ?* s3c_cpu_resume entry.\n" + "> >> + ? ? */\n" "> >> +\n" - "> >> + \302\240 \302\240 .word \302\240 0x2bedf00d\n" + "> >> + ? ? .word ? 0x2bedf00d\n" "> >> +\n" - "> >> + \302\240 \302\240 /* s3c_cpu_resume\n" - "> >> + \302\240 \302\240 \302\240*\n" - "> >> + \302\240 \302\240 \302\240* resume code entry for bootloader to call\n" - "> >> + \302\240 \302\240 \302\240*\n" - "> >> + \302\240 \302\240 \302\240* we must put this code here in the data segment as we have no\n" - "> >> + \302\240 \302\240 \302\240* other way of restoring the stack pointer after sleep, and we\n" - "> >> + \302\240 \302\240 \302\240* must not write to the code segment (code is read-only)\n" - "> >> + \302\240 \302\240 */\n" + "> >> + ? ? /* s3c_cpu_resume\n" + "> >> + ? ? ?*\n" + "> >> + ? ? ?* resume code entry for bootloader to call\n" + "> >> + ? ? ?*\n" + "> >> + ? ? ?* we must put this code here in the data segment as we have no\n" + "> >> + ? ? ?* other way of restoring the stack pointer after sleep, and we\n" + "> >> + ? ? ?* must not write to the code segment (code is read-only)\n" + "> >> + ? ? */\n" "> >> +\n" "> >> +ENTRY(s3c_cpu_resume)\n" - "> >> + \302\240 \302\240 mov \302\240 \302\240 r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE\n" - "> >> + \302\240 \302\240 msr \302\240 \302\240 cpsr_c, r0\n" + "> >> + ? ? mov ? ? r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE\n" + "> >> + ? ? msr ? ? cpsr_c, r0\n" "> >> +\n" - "> >> + \302\240 \302\240 mov \302\240 \302\240 r1, #0\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r1, c8, c7, 0 \302\240 \302\240 \302\240 \302\240 \302\240 @@ invalidate TLBs\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r1, c7, c5, 0 \302\240 \302\240 \302\240 \302\240 \302\240 @@ invalidate I Cache\n" + "> >> + ? ? mov ? ? r1, #0\n" + "> >> + ? ? mcr ? ? p15, 0, r1, c8, c7, 0 ? ? ? ? ? @@ invalidate TLBs\n" + "> >> + ? ? mcr ? ? p15, 0, r1, c7, c5, 0 ? ? ? ? ? @@ invalidate I Cache\n" "> >> +\n" - "> >> + \302\240 \302\240 ldr \302\240 \302\240 r0, s3c_sleep_save_phys \302\240 \302\240 \302\240 \302\240 @ address of restore block\n" - "> >> + \302\240 \302\240 ldmia \302\240 r0, { r3 - r13 }\n" + "> >> + ? ? ldr ? ? r0, s3c_sleep_save_phys ? ? ? ? @ address of restore block\n" + "> >> + ? ? ldmia ? r0, { r3 - r13 }\n" "> >> +\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r4, c13, c0, 0 \302\240 \302\240 \302\240 \302\240 \302\240@ FCSE/PID\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r5, c3, c0, 0 \302\240 \302\240 \302\240 \302\240 \302\240 @ Domain ID\n" + "> >> + ? ? mcr ? ? p15, 0, r4, c13, c0, 0 ? ? ? ? ?@ FCSE/PID\n" + "> >> + ? ? mcr ? ? p15, 0, r5, c3, c0, 0 ? ? ? ? ? @ Domain ID\n" "> >> +\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r8, c2, c0, 2 \302\240 \302\240 \302\240 \302\240 \302\240 @ Translation Table Control\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r7, c2, c0, 1 \302\240 \302\240 \302\240 \302\240 \302\240 @ Translation Table BASE1\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r6, c2, c0, 0 \302\240 \302\240 \302\240 \302\240 \302\240 @ Translation Table BASE0\n" + "> >> + ? ? mcr ? ? p15, 0, r8, c2, c0, 2 ? ? ? ? ? @ Translation Table Control\n" + "> >> + ? ? mcr ? ? p15, 0, r7, c2, c0, 1 ? ? ? ? ? @ Translation Table BASE1\n" + "> >> + ? ? mcr ? ? p15, 0, r6, c2, c0, 0 ? ? ? ? ? @ Translation Table BASE0\n" "> >> +\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r10, c1, c0, 1 \302\240 \302\240 \302\240 \302\240 \302\240@ Auxiliary control register\n" + "> >> + ? ? mcr ? ? p15, 0, r10, c1, c0, 1 ? ? ? ? ?@ Auxiliary control register\n" "> >> +\n" - "> >> + \302\240 \302\240 mov \302\240 \302\240 r0, #0\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r0, c8, c7, 0 \302\240 \302\240 \302\240 \302\240 \302\240 @ Invalidate I & D TLB\n" + "> >> + ? ? mov ? ? r0, #0\n" + "> >> + ? ? mcr ? ? p15, 0, r0, c8, c7, 0 ? ? ? ? ? @ Invalidate I & D TLB\n" "> >> +\n" - "> >> + \302\240 \302\240 mov \302\240 \302\240 r0, #0 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240@ restore copro access\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r11, c1, c0, 2 \302\240 \302\240 \302\240 \302\240 \302\240@ Co-processor access\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r0, c7, c5, 4\n" + "> >> + ? ? mov ? ? r0, #0 ? ? ? ? ? ? ? ? ? ? ? ? ?@ restore copro access\n" + "> >> + ? ? mcr ? ? p15, 0, r11, c1, c0, 2 ? ? ? ? ?@ Co-processor access\n" + "> >> + ? ? mcr ? ? p15, 0, r0, c7, c5, 4\n" "> >> +\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r12, c10, c2, 0 \302\240 \302\240 \302\240 \302\240 @ write PRRR\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r3, c10, c2, 1 \302\240 \302\240 \302\240 \302\240 \302\240@ write NMRR\n" + "> >> + ? ? mcr ? ? p15, 0, r12, c10, c2, 0 ? ? ? ? @ write PRRR\n" + "> >> + ? ? mcr ? ? p15, 0, r3, c10, c2, 1 ? ? ? ? ?@ write NMRR\n" "> >> +\n" - "> >> + \302\240 \302\240 /* Calculate first section address into r8\n" - "> >> + \302\240 \302\240 \302\240* In Cotex-A8 case, When MMU turn on, MMU is reseted.\n" + "> >> + ? ? /* Calculate first section address into r8\n" + "> >> + ? ? ?* In Cotex-A8 case, When MMU turn on, MMU is reseted.\n" "> >\n" "> > i'd fix this typo.\n" "> >\n" - "> >> + \302\240 \302\240 \302\240* So, before call resume_with_mmu, backup originally data.\n" - "> >> + \302\240 \302\240 */\n" + "> >> + ? ? ?* So, before call resume_with_mmu, backup originally data.\n" + "> >> + ? ? */\n" "> >> +\n" - "> >> + \302\240 \302\240 mov \302\240 \302\240 r4, r6\n" - "> >> + \302\240 \302\240 mov \302\240 \302\240 r4, r4, LSR #14\n" - "> >> + \302\240 \302\240 mov \302\240 \302\240 r4, r4, LSL #14\n" + "> >> + ? ? mov ? ? r4, r6\n" + "> >> + ? ? mov ? ? r4, r4, LSR #14\n" + "> >> + ? ? mov ? ? r4, r4, LSL #14\n" "> >> +\n" - "> >> + \302\240 \302\240 /* Load TLB Base address from INFORM0 */\n" + "> >> + ? ? /* Load TLB Base address from INFORM0 */\n" "> >\n" "> > do you mean mmu page table?\n" "> >\n" - "> >> + \302\240 \302\240 ldr \302\240 \302\240 r11, =0xe010f000\n" - "> >> + \302\240 \302\240 ldr \302\240 \302\240 r10, [r11, #0]\n" - "> >> + \302\240 \302\240 mov \302\240 \302\240 r10, r10, LSR #18\n" - "> >> + \302\240 \302\240 bic \302\240 \302\240 r10, r10, #0x3\n" - "> >> + \302\240 \302\240 orr \302\240 \302\240 r4, r4, r10\n" + "> >> + ? ? ldr ? ? r11, =0xe010f000\n" + "> >> + ? ? ldr ? ? r10, [r11, #0]\n" + "> >> + ? ? mov ? ? r10, r10, LSR #18\n" + "> >> + ? ? bic ? ? r10, r10, #0x3\n" + "> >> + ? ? orr ? ? r4, r4, r10\n" "> >> +\n" - "> >> + \302\240 \302\240 /* calculate mmu list value into r9 */\n" - "> >> + \302\240 \302\240 mov \302\240 \302\240 r10, r10, LSL #18\n" - "> >> + \302\240 \302\240 ldr \302\240 \302\240 r5, =0x40e\n" - "> >> + \302\240 \302\240 orr \302\240 \302\240 r10, r10, r5\n" + "> >> + ? ? /* calculate mmu list value into r9 */\n" + "> >> + ? ? mov ? ? r10, r10, LSL #18\n" + "> >> + ? ? ldr ? ? r5, =0x40e\n" + "> >> + ? ? orr ? ? r10, r10, r5\n" "> >> +\n" - "> >> + \302\240 \302\240 /* back up originally data */\n" + "> >> + ? ? /* back up originally data */\n" "> >> +\n" - "> >> + \302\240 \302\240 ldr \302\240 \302\240 r12, [r4]\n" + "> >> + ? ? ldr ? ? r12, [r4]\n" "> >> +\n" - "> >> + \302\240 \302\240 /* Added list about mmu */\n" - "> >> + \302\240 \302\240 str \302\240 \302\240 r10, [r4]\n" + "> >> + ? ? /* Added list about mmu */\n" + "> >> + ? ? str ? ? r10, [r4]\n" "> >\n" "> >\n" "> >\n" - "> >> + \302\240 \302\240 ldr \302\240 \302\240 r2, =resume_with_mmu\n" - "> >> + \302\240 \302\240 mcr \302\240 \302\240 p15, 0, r9, c1, c0, 0 \302\240 \302\240 \302\240 \302\240 \302\240 @ turn on MMU, etc\n" + "> >> + ? ? ldr ? ? r2, =resume_with_mmu\n" + "> >> + ? ? mcr ? ? p15, 0, r9, c1, c0, 0 ? ? ? ? ? @ turn on MMU, etc\n" "> >> +\n" - "> >> + \302\240 \302\240 nop\n" - "> >> + \302\240 \302\240 nop\n" - "> >> + \302\240 \302\240 nop\n" - "> >> + \302\240 \302\240 nop\n" - "> >> + \302\240 \302\240 nop \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 @ second-to-last before mmu\n" + "> >> + ? ? nop\n" + "> >> + ? ? nop\n" + "> >> + ? ? nop\n" + "> >> + ? ? nop\n" + "> >> + ? ? nop ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? @ second-to-last before mmu\n" "> >> +\n" - "> >> + \302\240 \302\240 mov \302\240 \302\240 pc, r2 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240@ go back to virtual address\n" + "> >> + ? ? mov ? ? pc, r2 ? ? ? ? ? ? ? ? ? ? ? ? ?@ go back to virtual address\n" "> >> +\n" - "> >> + \302\240 \302\240 .ltorg\n" + "> >> + ? ? .ltorg\n" "> >> diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile\n" "> >> index 39c242b..d04ae49 100644\n" "> >> --- a/arch/arm/plat-s5p/Makefile\n" "> >> +++ b/arch/arm/plat-s5p/Makefile\n" - "> >> @@ -18,3 +18,5 @@ obj-y \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 += clock.o\n" - "> >> \302\240obj-y \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240+= irq.o\n" - "> >> \302\240obj-$(CONFIG_S5P_EXT_INT) \302\240 \302\240+= irq-eint.o\n" + "> >> @@ -18,3 +18,5 @@ obj-y ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? += clock.o\n" + "> >> ?obj-y ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?+= irq.o\n" + "> >> ?obj-$(CONFIG_S5P_EXT_INT) ? ?+= irq-eint.o\n" "> >>\n" - "> >> +obj-$(CONFIG_PM) \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 += pm.o\n" - "> >> +obj-$(CONFIG_PM) \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 += irq-pm.o\n" + "> >> +obj-$(CONFIG_PM) ? ? ? ? ? ? += pm.o\n" + "> >> +obj-$(CONFIG_PM) ? ? ? ? ? ? += irq-pm.o\n" "> >> diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h\n" "> >> index 3fb3a3a..9ffdd62 100644\n" "> >> --- a/arch/arm/plat-s5p/include/plat/irqs.h\n" "> >> +++ b/arch/arm/plat-s5p/include/plat/irqs.h\n" "> >> @@ -94,4 +94,6 @@\n" - "> >> \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 ((irq) - S5P_EINT_BASE1) : \\\n" - "> >> \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 ((irq) + 16 - S5P_EINT_BASE2))\n" + "> >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ((irq) - S5P_EINT_BASE1) : \\\n" + "> >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ((irq) + 16 - S5P_EINT_BASE2))\n" "> >>\n" - "> >> +#define IRQ_EINT_BIT(x) \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240EINT_OFFSET(x)\n" + "> >> +#define IRQ_EINT_BIT(x) ? ? ? ? ? ? ?EINT_OFFSET(x)\n" "> >> +\n" - "> >> \302\240#endif /* __ASM_PLAT_S5P_IRQS_H */\n" + "> >> ?#endif /* __ASM_PLAT_S5P_IRQS_H */\n" "> >> diff --git a/arch/arm/plat-s5p/irq-pm.c b/arch/arm/plat-s5p/irq-pm.c\n" "> >> new file mode 100644\n" "> >> index 0000000..03e83a3\n" @@ -657,12 +652,12 @@ "> >> +/* linux/arch/arm/plat-s5p/irq-pm.c\n" "> >> + *\n" "> >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.\n" - "> >> + * \302\240 \302\240 \302\240 \302\240 \302\240 http://www.samsung.com\n" + "> >> + * ? ? ? ? ? http://www.samsung.com\n" "> >> + *\n" "> >> + * Based on arch/arm/plat-s3c24xx/irq-pm.c,\n" "> >> + * Copyright (c) 2003,2004 Simtec Electronics\n" - "> >> + * \302\240 Ben Dooks <ben@simtec.co.uk>\n" - "> >> + * \302\240 http://armlinux.simtec.co.uk/\n" + "> >> + * ? Ben Dooks <ben@simtec.co.uk>\n" + "> >> + * ? http://armlinux.simtec.co.uk/\n" "> >> + *\n" "> >> + * This program is free software; you can redistribute it and/or modify\n" "> >> + * it under the terms of the GNU General Public License version 2 as\n" @@ -690,79 +685,79 @@ "> >> + * set bit to 1 in allow bitfield to enable the wakeup settings on it\n" "> >> +*/\n" "> >> +\n" - "> >> +unsigned long s3c_irqwake_intallow \302\240 = 0x00000006L;\n" - "> >> +unsigned long s3c_irqwake_eintallow \302\240= 0xffffffffL;\n" + "> >> +unsigned long s3c_irqwake_intallow ? = 0x00000006L;\n" + "> >> +unsigned long s3c_irqwake_eintallow ?= 0xffffffffL;\n" "> >> +\n" "> >> +int s3c_irq_wake(unsigned int irqno, unsigned int state)\n" "> >> +{\n" - "> >> + \302\240 \302\240 unsigned long irqbit;\n" - "> >> +\n" - "> >> + \302\240 \302\240 switch (irqno) {\n" - "> >> + \302\240 \302\240 case IRQ_RTC_TIC:\n" - "> >> + \302\240 \302\240 case IRQ_RTC_ALARM:\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 irqbit = 1 << (irqno + 1 - IRQ_RTC_ALARM);\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 if (!state)\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 s3c_irqwake_intmask |= irqbit;\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 else\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 s3c_irqwake_intmask &= ~irqbit;\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 break;\n" - "> >> + \302\240 \302\240 default:\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 return -ENOENT;\n" - "> >> + \302\240 \302\240 }\n" - "> >> + \302\240 \302\240 return 0;\n" + "> >> + ? ? unsigned long irqbit;\n" + "> >> +\n" + "> >> + ? ? switch (irqno) {\n" + "> >> + ? ? case IRQ_RTC_TIC:\n" + "> >> + ? ? case IRQ_RTC_ALARM:\n" + "> >> + ? ? ? ? ? ? irqbit = 1 << (irqno + 1 - IRQ_RTC_ALARM);\n" + "> >> + ? ? ? ? ? ? if (!state)\n" + "> >> + ? ? ? ? ? ? ? ? ? ? s3c_irqwake_intmask |= irqbit;\n" + "> >> + ? ? ? ? ? ? else\n" + "> >> + ? ? ? ? ? ? ? ? ? ? s3c_irqwake_intmask &= ~irqbit;\n" + "> >> + ? ? ? ? ? ? break;\n" + "> >> + ? ? default:\n" + "> >> + ? ? ? ? ? ? return -ENOENT;\n" + "> >> + ? ? }\n" + "> >> + ? ? return 0;\n" "> >> +}\n" "> >> +\n" "> >> +/* this lot should be really saved by the IRQ code */\n" "> >> +/* VICXADDRESSXX initilaization to be needed */\n" "> >> +static struct sleep_save irq_save[] = {\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC0 + VIC_INT_SELECT),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC1 + VIC_INT_SELECT),\n" + "> >> + ? ? SAVE_ITEM(VA_VIC0 + VIC_INT_SELECT),\n" + "> >> + ? ? SAVE_ITEM(VA_VIC1 + VIC_INT_SELECT),\n" "> >> +\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC0 + VIC_INT_ENABLE),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC1 + VIC_INT_ENABLE),\n" + "> >> + ? ? SAVE_ITEM(VA_VIC0 + VIC_INT_ENABLE),\n" + "> >> + ? ? SAVE_ITEM(VA_VIC1 + VIC_INT_ENABLE),\n" "> >> +\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC0 + VIC_INT_SOFT),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(VA_VIC1 + VIC_INT_SOFT),\n" + "> >> + ? ? SAVE_ITEM(VA_VIC0 + VIC_INT_SOFT),\n" + "> >> + ? ? SAVE_ITEM(VA_VIC1 + VIC_INT_SOFT),\n" "> \n" "> S5PV210 has VIC2,3 as well. Maybe those can be moved from pm.c to here.\n" "> \n" "> >> +};\n" "> >> +\n" "> >> +static struct sleep_save eint_save[] = {\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_CON(0)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_CON(1)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_CON(2)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_CON(3)),\n" - "> >> +\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_FLTCON(0)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_FLTCON(1)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_FLTCON(2)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_FLTCON(3)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_FLTCON(4)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_FLTCON(5)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_FLTCON(6)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_FLTCON(7)),\n" - "> >> +\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_MASK(0)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_MASK(1)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_MASK(2)),\n" - "> >> + \302\240 \302\240 SAVE_ITEM(S5P_EINT_MASK(3)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_CON(0)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_CON(1)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_CON(2)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_CON(3)),\n" + "> >> +\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(0)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(1)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(2)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(3)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(4)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(5)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(6)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_FLTCON(7)),\n" + "> >> +\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_MASK(0)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_MASK(1)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_MASK(2)),\n" + "> >> + ? ? SAVE_ITEM(S5P_EINT_MASK(3)),\n" "> >> +};\n" "> >> +\n" "> >> +int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state)\n" "> >> +{\n" - "> >> + \302\240 \302\240 s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save));\n" - "> >> + \302\240 \302\240 s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));\n" + "> >> + ? ? s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save));\n" + "> >> + ? ? s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));\n" "> >> +\n" - "> >> + \302\240 \302\240 return 0;\n" + "> >> + ? ? return 0;\n" "> >> +}\n" "> >> +\n" "> >> +int s3c24xx_irq_resume(struct sys_device *dev)\n" "> >> +{\n" - "> >> + \302\240 \302\240 s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));\n" - "> >> + \302\240 \302\240 s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save));\n" + "> >> + ? ? s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));\n" + "> >> + ? ? s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save));\n" "> >> +\n" - "> >> + \302\240 \302\240 return 0;\n" + "> >> + ? ? return 0;\n" "> >> +}\n" "> >> +\n" "> >> diff --git a/arch/arm/plat-s5p/pm.c b/arch/arm/plat-s5p/pm.c\n" @@ -774,13 +769,13 @@ "> >> +/* linux/arch/arm/plat-s5p/pm.c\n" "> >> + *\n" "> >> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.\n" - "> >> + * \302\240 \302\240 \302\240 \302\240 \302\240 http://www.samsung.com\n" + "> >> + * ? ? ? ? ? http://www.samsung.com\n" "> >> + *\n" "> >> + * S5P Power Manager (Suspend-To-RAM) support\n" "> >> + *\n" "> >> + * Based on arch/arm/plat-s3c24xx/pm.c\n" "> >> + * Copyright (c) 2004,2006 Simtec Electronics\n" - "> >> + * \302\240 Ben Dooks <ben@simtec.co.uk>\n" + "> >> + * ? Ben Dooks <ben@simtec.co.uk>\n" "> >> + *\n" "> >> + * This program is free software; you can redistribute it and/or modify\n" "> >> + * it under the terms of the GNU General Public License version 2 as\n" @@ -800,7 +795,7 @@ "> >> +\n" "> >> +static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs)\n" "> >> +{\n" - "> >> + \302\240 \302\240 /* nothing here yet */\n" + "> >> + ? ? /* nothing here yet */\n" "> >> +}\n" "> >> +\n" "> >> +/* s3c_pm_configure_extint\n" @@ -810,17 +805,17 @@ "> >> +\n" "> >> +void s3c_pm_configure_extint(void)\n" "> >> +{\n" - "> >> + \302\240 \302\240 /* nothing here yet */\n" + "> >> + ? ? /* nothing here yet */\n" "> >> +}\n" "> >> +\n" "> >> +void s3c_pm_restore_core(void)\n" "> >> +{\n" - "> >> + \302\240 \302\240 /* nothing here yet */\n" + "> >> + ? ? /* nothing here yet */\n" "> >> +}\n" "> >> +\n" "> >> +void s3c_pm_save_core(void)\n" "> >> +{\n" - "> >> + \302\240 \302\240 /* nothing here yet */\n" + "> >> + ? ? /* nothing here yet */\n" "> >> +}\n" "> >> +\n" "> >> diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c\n" @@ -828,23 +823,23 @@ "> >> --- a/arch/arm/plat-samsung/pm-gpio.c\n" "> >> +++ b/arch/arm/plat-samsung/pm-gpio.c\n" "> >> @@ -192,7 +192,7 @@ struct s3c_gpio_pm s3c_gpio_pm_2bit = {\n" - "> >> \302\240 \302\240 \302\240 .resume = s3c_gpio_pm_2bit_resume,\n" - "> >> \302\240};\n" + "> >> ? ? ? .resume = s3c_gpio_pm_2bit_resume,\n" + "> >> ?};\n" "> >>\n" "> >> -#ifdef CONFIG_ARCH_S3C64XX\n" "> >> +#if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P)\n" - "> >> \302\240static void s3c_gpio_pm_4bit_save(struct s3c_gpio_chip *chip)\n" - "> >> \302\240{\n" - "> >> \302\240 \302\240 \302\240 chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON);\n" + "> >> ?static void s3c_gpio_pm_4bit_save(struct s3c_gpio_chip *chip)\n" + "> >> ?{\n" + "> >> ? ? ? chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON);\n" "> >> @@ -302,7 +302,7 @@ struct s3c_gpio_pm s3c_gpio_pm_4bit = {\n" - "> >> \302\240 \302\240 \302\240 .save \302\240 = s3c_gpio_pm_4bit_save,\n" - "> >> \302\240 \302\240 \302\240 .resume = s3c_gpio_pm_4bit_resume,\n" - "> >> \302\240};\n" + "> >> ? ? ? .save ? = s3c_gpio_pm_4bit_save,\n" + "> >> ? ? ? .resume = s3c_gpio_pm_4bit_resume,\n" + "> >> ?};\n" "> >> -#endif /* CONFIG_ARCH_S3C64XX */\n" "> >> +#endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P */\n" "> >>\n" - "> >> \302\240/**\n" - "> >> \302\240 * s3c_pm_save_gpio() - save gpio chip data for suspend\n" + "> >> ?/**\n" + "> >> ? * s3c_pm_save_gpio() - save gpio chip data for suspend\n" "> >> --\n" "> >> 1.6.2.5\n" "> >>\n" @@ -854,13 +849,13 @@ "> > --\n" "> > Ben\n" "> >\n" - "> > Q: \302\240 \302\240 \302\240What's a light-year?\n" - "> > A: \302\240 \302\240 \302\240One-third less calories than a regular year.\n" + "> > Q: ? ? ?What's a light-year?\n" + "> > A: ? ? ?One-third less calories than a regular year.\n" "> >\n" "> >\n" "> > _______________________________________________\n" "> > linux-arm-kernel mailing list\n" - "> > linux-arm-kernel@lists.infradead.org\n" + "> > linux-arm-kernel at lists.infradead.org\n" "> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n" "> >\n" "> \n" @@ -875,7 +870,7 @@ "> \n" "> _______________________________________________\n" "> linux-arm-kernel mailing list\n" - "> linux-arm-kernel@lists.infradead.org\n" + "> linux-arm-kernel at lists.infradead.org\n" "> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n" "\n" "-- \n" @@ -885,4 +880,4 @@ "Q: What's a light-year?\n" A: One-third less calories than a regular year. -87e9d9fcec02f42426a3ef033773f48c8204599bb2b7349935d2d24c1faf2e1b +0ccc65f65d05b6b23bd863529739aefd8a3aba965af56f426fc36cb61ef2e164
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