From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Kay, Allen M" Subject: [PATCH][VTD] fixed a timing issue on DELL calpella laptop while doing graphics pass-through Date: Thu, 3 Jun 2010 17:22:06 -0700 Message-ID: <987664A83D2D224EAE907B061CE93D530114C3D636@orsmsx505.amr.corp.intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="_004_987664A83D2D224EAE907B061CE93D530114C3D636orsmsx505amrc_" Return-path: Content-Language: en-US List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: "xen-devel@lists.xensource.com" Cc: "ian.pratt@eu.citrix.com" , "Han, Weidong" , "Ross.Philipson@citrix.com" , "jean.guyader@citrix.com" List-Id: xen-devel@lists.xenproject.org --_004_987664A83D2D224EAE907B061CE93D530114C3D636orsmsx505amrc_ Content-Type: multipart/alternative; boundary="_000_987664A83D2D224EAE907B061CE93D530114C3D636orsmsx505amrc_" --_000_987664A83D2D224EAE907B061CE93D530114C3D636orsmsx505amrc_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Added additional sleep time between FLR and PCI config restore. Signed-off-by: Allen Kay > --_000_987664A83D2D224EAE907B061CE93D530114C3D636orsmsx505amrc_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Added additional sleep time between FLR and PCI con= fig restore.

Signed-off-by: Allen Kay <allen.m.kay@intel.com>

--_000_987664A83D2D224EAE907B061CE93D530114C3D636orsmsx505amrc_-- --_004_987664A83D2D224EAE907B061CE93D530114C3D636orsmsx505amrc_ Content-Type: application/octet-stream; name="igd-xen0603.patch" Content-Description: igd-xen0603.patch Content-Disposition: attachment; filename="igd-xen0603.patch"; size=404; creation-date="Thu, 03 Jun 2010 17:20:46 GMT"; modification-date="Thu, 03 Jun 2010 17:04:26 GMT" Content-Transfer-Encoding: base64 ZGlmZiAtciAzNzBmZDlmOTdjNzAgdG9vbHMvcHl0aG9uL3hlbi91dGlsL3BjaS5weQotLS0gYS90 b29scy9weXRob24veGVuL3V0aWwvcGNpLnB5CVNhdCBNYXkgMjIgMDc6MTg6MTYgMjAxMCArMDEw MAorKysgYi90b29scy9weXRob24veGVuL3V0aWwvcGNpLnB5CVRodSBKdW4gMDMgMTE6NDI6MDUg MjAxMCAtMDcwMApAQCAtNTIzLDYgKzUyMyw3IEBACiAgICAgcmV0dXJuIChwY2lfbGlzdCwgY2Zn X2xpc3QpCiAKIGRlZiByZXN0b3JlX3BjaV9jb25mX3NwYWNlKHBjaV9jZmdfbGlzdCk6CisgICAg dGltZS5zbGVlcCgxLjApCiAgICAgcGNpX2xpc3QgPSBwY2lfY2ZnX2xpc3RbMF0KICAgICBjZmdf bGlzdCA9IHBjaV9jZmdfbGlzdFsxXQogICAgIGZvciBpIGluIHJhbmdlKDAsIGxlbihwY2lfbGlz dCkpOgo= --_004_987664A83D2D224EAE907B061CE93D530114C3D636orsmsx505amrc_ Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel --_004_987664A83D2D224EAE907B061CE93D530114C3D636orsmsx505amrc_-- From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jean Guyader Subject: Re: [PATCH][VTD] fixed a timing issue on DELL calpella laptop while doing graphics pass-through Date: Fri, 4 Jun 2010 09:53:55 +0100 Message-ID: References: <987664A83D2D224EAE907B061CE93D530114C3D636@orsmsx505.amr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Return-path: In-Reply-To: <987664A83D2D224EAE907B061CE93D530114C3D636@orsmsx505.amr.corp.intel.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: "Kay, Allen M" Cc: "ian.pratt@eu.citrix.com" , "xen-devel@lists.xensource.com" , "Han, Weidong" , "jean.guyader@citrix.com" , "Ross.Philipson@citrix.com" List-Id: xen-devel@lists.xenproject.org On 4 June 2010 01:22, Kay, Allen M wrote: > Added additional sleep time between FLR and PCI config restore. > > > > Signed-off-by: Allen Kay > Yes, to take more time to do an FLR on those platform, but I don't think this is a proper fix. The fix we have for that in our tree (XCI) is to make sure the value we write when we restore the pci config space stick in pciback. I'll send the patch later today, Jean From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Kay, Allen M" Subject: RE: [PATCH][VTD] fixed a timing issue on DELL calpella laptop while doing graphics pass-through Date: Fri, 4 Jun 2010 06:30:20 -0700 Message-ID: <987664A83D2D224EAE907B061CE93D530114C3D752@orsmsx505.amr.corp.intel.com> References: <987664A83D2D224EAE907B061CE93D530114C3D636@orsmsx505.amr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Jean Guyader Cc: "ian.pratt@eu.citrix.com" , "xen-devel@lists.xensource.com" , "Han, Weidong" , "jean.guyader@citrix.com" , "Ross.Philipson@citrix.com" List-Id: xen-devel@lists.xenproject.org That's a more robust fix. Thanks. Allen -----Original Message----- From: Jean Guyader [mailto:jean.guyader@gmail.com]=20 Sent: Friday, June 04, 2010 1:54 AM To: Kay, Allen M Cc: xen-devel@lists.xensource.com; ian.pratt@eu.citrix.com; Han, Weidong; R= oss.Philipson@citrix.com; jean.guyader@citrix.com Subject: Re: [Xen-devel] [PATCH][VTD] fixed a timing issue on DELL calpella= laptop while doing graphics pass-through On 4 June 2010 01:22, Kay, Allen M wrote: > Added additional sleep time between FLR and PCI config restore. > > > > Signed-off-by: Allen Kay > Yes, to take more time to do an FLR on those platform, but I don't think this is a proper fix. The fix we have for that in our tree (XCI) is to make sure the value we write when we restore the pci config space stick in pciback. I'll send the patch later today, Jean From mboxrd@z Thu Jan 1 00:00:00 1970 From: Konrad Rzeszutek Wilk Subject: Re: [PATCH][VTD] fixed a timing issue on DELL calpella laptop while doing graphics pass-through Date: Fri, 4 Jun 2010 16:30:40 -0400 Message-ID: <20100604203040.GC28034@phenom.dumpdata.com> References: <987664A83D2D224EAE907B061CE93D530114C3D636@orsmsx505.amr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Jean Guyader Cc: "xen-devel@lists.xensource.com" , "Kay, Allen M" , "Han, Weidong" , "jean.guyader@citrix.com" , "ian.pratt@eu.citrix.com" , "Ross.Philipson@citrix.com" List-Id: xen-devel@lists.xenproject.org > Yes, to take more time to do an FLR on those platform, but I don't think > this is a proper fix. The fix we have for that in our tree (XCI) is to make > sure the value we write when we restore the pci config space stick in > pciback. > > I'll send the patch later today, Please send it to me as well so I can stick in the proper pv-ops tree. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jean Guyader Subject: Re: [PATCH][VTD] fixed a timing issue on DELL calpella laptop while doing graphics pass-through Date: Sat, 5 Jun 2010 09:40:10 +0100 Message-ID: <20100605084010.GA16920@angi.xci-test.com> References: <987664A83D2D224EAE907B061CE93D530114C3D636@orsmsx505.amr.corp.intel.com> <20100604203040.GC28034@phenom.dumpdata.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="oyUTqETQ0mS9luUI" Return-path: Content-Disposition: inline In-Reply-To: <20100604203040.GC28034@phenom.dumpdata.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Konrad Rzeszutek Wilk Cc: "xen-devel@lists.xensource.com" , "Kay, Allen M" , "Han, Weidong" , Jean Guyader , Ian Pratt , Ross Philipson , Jean Guyader List-Id: xen-devel@lists.xenproject.org --oyUTqETQ0mS9luUI Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline On Fri, Jun 04, 2010 at 09:30:40PM +0100, Konrad Rzeszutek Wilk wrote: > > Yes, to take more time to do an FLR on those platform, but I don't think > > this is a proper fix. The fix we have for that in our tree (XCI) is to make > > sure the value we write when we restore the pci config space stick in > > pciback. > > > > I'll send the patch later today, > > Please send it to me as well so I can stick in the proper pv-ops tree. Thanks Konrad. Here is the patch for a 2.6.27 kernel. pciback: Verify write when restoring the pci config space after FLR Signed-off-by: Jean Guyader --oyUTqETQ0mS9luUI Content-Type: text/plain; charset="us-ascii" Content-Disposition: attachment; filename="pciback-verify-write-after-flr" diff --git a/drivers/xen/pciback/pciback_ops.c b/drivers/xen/pciback/pciback_ops.c index 2b77b31..62267e3 100644 --- a/drivers/xen/pciback/pciback_ops.c +++ b/drivers/xen/pciback/pciback_ops.c @@ -56,11 +56,20 @@ void pciback_reload_config_space(struct pci_dev *dev) struct pciback_dev_data *dev_data = pci_get_drvdata(dev); u32 *ptr = (u32*)dev_data->cfg_space; int i, val, count = dev->cfg_size/sizeof(u32); + int limit = 0; for (i = 0; i < count; i += sizeof(u32), ptr++) { pci_read_config_dword(dev, i, &val); - if (val != *ptr) + while (limit < 1000 && val != *ptr) + { pci_write_config_dword(dev, i, *ptr); + pci_read_config_dword(dev, i, &val); + mdelay(1); + limit++; + } + if (limit == 1000) + printk(KERN_ERR "pciback: Error reloading config space after flr dev:%x offset:%x\n", + dev->devfn, i); } } --oyUTqETQ0mS9luUI Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel --oyUTqETQ0mS9luUI-- From mboxrd@z Thu Jan 1 00:00:00 1970 From: Konrad Rzeszutek Wilk Subject: Re: [PATCH][VTD] fixed a timing issue on DELL calpella laptop while doing graphics pass-through Date: Mon, 7 Jun 2010 11:58:05 -0400 Message-ID: <20100607155805.GD8487@phenom.dumpdata.com> References: <987664A83D2D224EAE907B061CE93D530114C3D636@orsmsx505.amr.corp.intel.com> <20100604203040.GC28034@phenom.dumpdata.com> <20100605084010.GA16920@angi.xci-test.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20100605084010.GA16920@angi.xci-test.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Jean Guyader Cc: "xen-devel@lists.xensource.com" , "Kay, Allen M" , "Han, Weidong" , Jean Guyader , Ian Pratt , Ross Philipson , Jean Guyader List-Id: xen-devel@lists.xenproject.org On Sat, Jun 05, 2010 at 09:40:10AM +0100, Jean Guyader wrote: > On Fri, Jun 04, 2010 at 09:30:40PM +0100, Konrad Rzeszutek Wilk wrote: > > > Yes, to take more time to do an FLR on those platform, but I don't think > > > this is a proper fix. The fix we have for that in our tree (XCI) is to make > > > sure the value we write when we restore the pci config space stick in > > > pciback. > > > > > > I'll send the patch later today, > > > > Please send it to me as well so I can stick in the proper pv-ops tree. > > Thanks Konrad. > > Here is the patch for a 2.6.27 kernel. I seem to be missing a wealth of previous checkins. There is no pciback_reload_config_space in the pciback code that I pulled from 2.6.18. If you could re-base against Jeremy's PV-OPS kernel and send those patches that would be tremendously helpful. Here is a Wiki that explains in detail how to get the PV-OPS kernel and build it: http://wiki.xensource.com/xenwiki/XenParavirtOps Much appreciated! > > pciback: Verify write when restoring the pci config space after FLR > > Signed-off-by: Jean Guyader > diff --git a/drivers/xen/pciback/pciback_ops.c b/drivers/xen/pciback/pciback_ops.c > index 2b77b31..62267e3 100644 > --- a/drivers/xen/pciback/pciback_ops.c > +++ b/drivers/xen/pciback/pciback_ops.c > @@ -56,11 +56,20 @@ void pciback_reload_config_space(struct pci_dev *dev) > struct pciback_dev_data *dev_data = pci_get_drvdata(dev); > u32 *ptr = (u32*)dev_data->cfg_space; > int i, val, count = dev->cfg_size/sizeof(u32); > + int limit = 0; > > for (i = 0; i < count; i += sizeof(u32), ptr++) { > pci_read_config_dword(dev, i, &val); > - if (val != *ptr) > + while (limit < 1000 && val != *ptr) > + { > pci_write_config_dword(dev, i, *ptr); > + pci_read_config_dword(dev, i, &val); > + mdelay(1); > + limit++; > + } > + if (limit == 1000) > + printk(KERN_ERR "pciback: Error reloading config space after flr dev:%x offset:%x\n", > + dev->devfn, i); > } > } >