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From: Paul Brook <paul@codesourcery.com>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>,
	Jan Kiszka <jan.kiszka@web.de>,
	qemu-devel@nongnu.org, Gleb Natapov <gleb@redhat.com>,
	Juan Quintela <quintela@redhat.com>
Subject: Re: [Qemu-devel] [PATCH 09/16] Enable message delivery via IRQs
Date: Sat, 12 Jun 2010 21:15:37 +0100	[thread overview]
Message-ID: <201006122115.38581.paul@codesourcery.com> (raw)
In-Reply-To: <AANLkTilhCLANjs6dTH3gu_M_l-haeU2jWr7Jxy1igJtZ@mail.gmail.com>

> > [*] A simple unidirectional dma request line is suitable for qmu_irq. A
> > DMA system that transfers data outside of memory read/write transactions
> > is not. e.g. ISA effectively defines a regular memory bus plus 8
> > bidirectional data streams (aka DMA channels). These are multiplexed
> > over the same physical pins, but logically distinct. The DMA channels
> > could either be bundled up into the ISA bus interface, or modelled as
> > links between devices and the DMA controller.
> 
> Very very interesting. There's some out of band data related to DMA
> (bus errors, IOMMU faults, ISA DREQ) which hasn't been covered in
> previous Generic DMA proposals.

I suspect you're confusing two different concepts - bus-master DMA (memory 
accesses generated by devices) v.s. IO channel DMA (out of band data stream 
between a device and a third party DMA engine). Despite both being called 
"DMA", they significantly different beasts. The IO channel DMA master is 
effectively a bridge between the memory bus (accessed via bus-master DMA) and 
the device IO channel.

Note that actual IO channel DMA is relatively rare. While many embedded 
devices still have a DMA engine this tends to generate regular memory 
accesses, which are then programmed to access a memory mapped FIFO. This 
shouldn't need any special magic to implement, typically just a simple 
qemu_irq control line.

> Maybe all we need is a generic side
> band link, which would be usable for point to point (qemu_irq,
> coalescing, messages) and bus channels?

We may want to consider a common mechanism for mapping links between devices. 
i.e some way of saying "Connect device X port N to device Y port M". In the 
case of traditional interrupts each IRQ source or sink would be a "port". For 
a bus system you'd probably want to connect them all to a [virtual] bus 
arbiter object.

This should allow the mapping core to verify that e.g. you're not connecting a 
qemu_irq to something expecting an apic_message, preferably without knowing or 
caring how either of those work.

In theory I guess you could also use the same mechanism to connect network 
devices to their host interface, etc.  I haven't thought this bit through 
fully, so this may be excessively clever.

Paul

  reply	other threads:[~2010-06-12 20:16 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-06-06  8:10 [Qemu-devel] [PATCH 00/16] HPET cleanups, fixes, enhancements Jan Kiszka
2010-06-06  8:10 ` [Qemu-devel] [PATCH 01/16] hpet: Catch out-of-bounds timer access Jan Kiszka
2010-06-06  8:10 ` [Qemu-devel] [PATCH 02/16] hpet: Coding style cleanups and some refactorings Jan Kiszka
2010-06-06  8:10 ` [Qemu-devel] [PATCH 03/16] hpet: Silence warning on write to running main counter Jan Kiszka
2010-06-06  8:10 ` [Qemu-devel] [PATCH 04/16] hpet: Move static timer field initialization Jan Kiszka
2010-06-06  8:10 ` [Qemu-devel] [PATCH 05/16] hpet: Convert to qdev Jan Kiszka
2010-06-06  8:10 ` [Qemu-devel] [PATCH 06/16] hpet: Start/stop timer when HPET_TN_ENABLE is modified Jan Kiszka
2010-06-06  8:10 ` [Qemu-devel] [PATCH 07/16] monitor/QMP: Drop info hpet / query-hpet Jan Kiszka
2010-06-06  8:10 ` [Qemu-devel] [PATCH 08/16] Pass IRQ object on handler invocation Jan Kiszka
2010-06-12 10:31   ` [Qemu-devel] [PATCH v3 " Jan Kiszka
2010-06-06  8:10 ` [Qemu-devel] [PATCH 09/16] Enable message delivery via IRQs Jan Kiszka
2010-06-12 12:21   ` Paul Brook
2010-06-12 12:32     ` Jan Kiszka
2010-06-12 13:44     ` Blue Swirl
2010-06-12 14:15       ` Paul Brook
2010-06-12 14:35         ` Blue Swirl
2010-06-12 15:58           ` Paul Brook
2010-06-12 19:33             ` Blue Swirl
2010-06-12 20:15               ` Paul Brook [this message]
2010-06-12 20:32               ` Blue Swirl
2010-06-13  6:47                 ` Blue Swirl
2010-06-13 15:49                 ` Paul Brook
2010-06-13 18:17                   ` Blue Swirl
2010-06-13 18:39                     ` Paul Brook
2010-06-13 18:54                       ` Blue Swirl
2010-06-13 19:38                         ` Paul Brook
2010-06-13 16:34         ` Paul Brook
2010-06-13 18:04           ` Blue Swirl
2010-06-14  5:40           ` Gleb Natapov
2010-06-06  8:10 ` [Qemu-devel] [PATCH 10/16] x86: Refactor RTC IRQ coalescing workaround Jan Kiszka
2010-06-06  8:49   ` [Qemu-devel] " Blue Swirl
2010-06-06  9:06     ` Jan Kiszka
2010-06-06  8:11 ` [Qemu-devel] [PATCH 11/16] hpet/rtc: Rework RTC IRQ replacement by HPET Jan Kiszka
2010-06-06  8:53   ` [Qemu-devel] " Blue Swirl
2010-06-06  9:09     ` Jan Kiszka
2010-06-06  8:11 ` [Qemu-devel] [PATCH 12/16] hpet: Drop static state Jan Kiszka
2010-06-06  8:11 ` [Qemu-devel] [PATCH 13/16] hpet: Add support for level-triggered interrupts Jan Kiszka
2010-06-06  8:11 ` [Qemu-devel] [PATCH 14/16] vmstate: Add VMSTATE_STRUCT_VARRAY_UINT8 Jan Kiszka
2010-06-06  8:11 ` [Qemu-devel] [PATCH 15/16] hpet: Make number of timers configurable Jan Kiszka
2010-06-06  8:11 ` [Qemu-devel] [PATCH 16/16] hpet: Add MSI support Jan Kiszka
2010-06-11 21:31   ` Paul Brook
2010-06-12 10:23     ` [Qemu-devel] [PATCH v3 " Jan Kiszka
2010-06-06  8:56 ` [Qemu-devel] Re: [PATCH 00/16] HPET cleanups, fixes, enhancements Blue Swirl
2010-06-06  9:12   ` Jan Kiszka

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