From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=54552 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1ONqIP-0002OG-T9 for qemu-devel@nongnu.org; Sun, 13 Jun 2010 12:44:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1ONqIO-0006Fv-Ly for qemu-devel@nongnu.org; Sun, 13 Jun 2010 12:44:29 -0400 Received: from hall.aurel32.net ([88.191.82.174]:39559) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1ONqIO-0006DT-Hd for qemu-devel@nongnu.org; Sun, 13 Jun 2010 12:44:28 -0400 Date: Sun, 13 Jun 2010 18:44:12 +0200 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH 15/35] tcg-s390: Query instruction extensions that are installed. Message-ID: <20100613164412.GA17992@volta.aurel32.net> References: <1275678883-7082-1-git-send-email-rth@twiddle.net> <1275678883-7082-16-git-send-email-rth@twiddle.net> <20100610102815.GM26968@volta.aurel32.net> <4C1164ED.7020403@twiddle.net> <20100611080634.GP26968@volta.aurel32.net> <4C12368D.3050807@twiddle.net> <20100613104940.GA30341@volta.aurel32.net> <4C150120.2050600@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <4C150120.2050600@twiddle.net> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org, agraf@suse.de On Sun, Jun 13, 2010 at 09:02:40AM -0700, Richard Henderson wrote: > On 06/13/2010 03:49 AM, Aurelien Jarno wrote: > >> Also, what era is that second machine without highgprs? Is it running an > >> old kernel, or a 32-bit kernel? > > > > I have very few infos about it, it's an IBM System z10 machine running a > > 64-bit 2.6.26 kernel. > > Ah, I see it now: ea2a4d3a3a929ef494952bba57a0ef1a8a877881 > > [S390] 64-bit register support for 31-bit processes > > which adds a mechanism to pass the high parts of the gprs > in the ucontext to the 31-bit signal handler, and adds a > spot for them in the 31-bit core dump. > > It doesn't change the actual saving of registers within > the kernel. Since we take asynchronous signals and return > from them (as opposed to always longjmping out), we cannot > use the full 64-bit register within a 31-bit process without > having that bit set in HWCAP. > > Something to remember if we ever implement TCG for 31-bit mode. > At the moment we only allow KVM in 31-bit mode. > Is KVM in 31-bit mode actually functional? -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net