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diff for duplicates of <20100623075703.GB12255@atomide.com>

diff --git a/a/1.txt b/N1/1.txt
index 710680b..7bf8f06 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -35,3 +35,10 @@ dependency to the previous patch.
 Regards,
 
 Tony
+-------------- next part --------------
+A non-text attachment was scrubbed...
+Name: vfpv3-armv6-fix.patch
+Type: text/x-diff
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+Desc: not available
+URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20100623/75317dfe/attachment.bin>
diff --git a/a/2.hdr b/a/2.hdr
deleted file mode 100644
index b7e2360..0000000
--- a/a/2.hdr
+++ /dev/null
@@ -1,2 +0,0 @@
-Content-Type: text/x-diff; charset=us-ascii
-Content-Disposition: inline; filename="vfpv3-armv6-fix.patch"
diff --git a/a/2.txt b/a/2.txt
deleted file mode 100644
index 53acc5c..0000000
--- a/a/2.txt
+++ /dev/null
@@ -1,100 +0,0 @@
-From: Tony Lindgren <tony@atomide.com>
-Date: Mon, 21 Jun 2010 16:33:28 +0300
-Subject: [PATCH] arm: Make VFPv3 usable on ARMv6
-
-MVFR0 and MVFR1 are only available starting with ARM1136 r1p0 release
-according to "B.5 VFP changes" in DDI0211F_arm1136_r1p0_trm.pdf. This is
-also when TLS register got added, so we can use HAS_TLS also to test for
-MVFR0 and MVFR1.
-
-Otherwise VFPFMRX and VFPFMXR access fails and we get:
-
-Internal error: Oops - undefined instruction: 0 [#1]
-PC is at no_old_VFP_process+0x8/0x3c
-LR is at __und_svc+0x48/0x80
-...
-
-Signed-off-by: Tony Lindgren <tony@atomide.com>
-
-diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
-index 422f3cc..3d5fc41 100644
---- a/arch/arm/include/asm/vfpmacros.h
-+++ b/arch/arm/include/asm/vfpmacros.h
-@@ -3,6 +3,8 @@
-  *
-  * Assembler-only file containing VFP macros and register definitions.
-  */
-+#include <asm/hwcap.h>
-+
- #include "vfp.h"
- 
- @ Macros to allow building with old toolkits (with no VFP support)
-@@ -22,12 +24,20 @@
- 	LDC	p11, cr0, [\base],#32*4		    @ FLDMIAD \base!, {d0-d15}
- #endif
- #ifdef CONFIG_VFPv3
-+#if __LINUX_ARM_ARCH__ <= 6
-+	ldr	\tmp, =elf_hwcap		    @ may not have MVFR regs
-+	ldr	\tmp, [\tmp, #0]
-+	tst	\tmp, #HWCAP_VFPv3D16
-+	ldceq	p11, cr0, [\base],#32*4		    @ FLDMIAD \base!, {d16-d31}
-+	addne	\base, \base, #32*4		    @ step over unused register space
-+#else
- 	VFPFMRX	\tmp, MVFR0			    @ Media and VFP Feature Register 0
- 	and	\tmp, \tmp, #MVFR0_A_SIMD_MASK	    @ A_SIMD field
- 	cmp	\tmp, #2			    @ 32 x 64bit registers?
- 	ldceql	p11, cr0, [\base],#32*4		    @ FLDMIAD \base!, {d16-d31}
- 	addne	\base, \base, #32*4		    @ step over unused register space
- #endif
-+#endif
- 	.endm
- 
- 	@ write all the working registers out of the VFP
-@@ -38,10 +48,18 @@
- 	STC	p11, cr0, [\base],#32*4		    @ FSTMIAD \base!, {d0-d15}
- #endif
- #ifdef CONFIG_VFPv3
-+#if __LINUX_ARM_ARCH__ <= 6
-+	ldr	\tmp, =elf_hwcap		    @ may not have MVFR regs
-+	ldr	\tmp, [\tmp, #0]
-+	tst	\tmp, #HWCAP_VFPv3D16
-+	stceq	p11, cr0, [\base],#32*4		    @ FSTMIAD \base!, {d16-d31}
-+	addne	\base, \base, #32*4		    @ step over unused register space
-+#else
- 	VFPFMRX	\tmp, MVFR0			    @ Media and VFP Feature Register 0
- 	and	\tmp, \tmp, #MVFR0_A_SIMD_MASK	    @ A_SIMD field
- 	cmp	\tmp, #2			    @ 32 x 64bit registers?
- 	stceql	p11, cr0, [\base],#32*4		    @ FSTMIAD \base!, {d16-d31}
- 	addne	\base, \base, #32*4		    @ step over unused register space
- #endif
-+#endif
- 	.endm
-diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
-index 315a540..8063a32 100644
---- a/arch/arm/vfp/vfpmodule.c
-+++ b/arch/arm/vfp/vfpmodule.c
-@@ -15,6 +15,7 @@
- #include <linux/sched.h>
- #include <linux/init.h>
- 
-+#include <asm/cputype.h>
- #include <asm/thread_notify.h>
- #include <asm/vfp.h>
- 
-@@ -549,10 +550,13 @@ static int __init vfp_init(void)
- 		/*
- 		 * Check for the presence of the Advanced SIMD
- 		 * load/store instructions, integer and single
--		 * precision floating point operations.
-+		 * precision floating point operations. Only check
-+		 * for NEON if the hardware has the MVFR registers.
- 		 */
--		if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
--			elf_hwcap |= HWCAP_NEON;
-+		if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
-+			if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
-+				elf_hwcap |= HWCAP_NEON;
-+		}
- #endif
- 	}
- 	return 0;
diff --git a/a/content_digest b/N1/content_digest
index db1e792..7e046d0 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,13 +1,11 @@
  "ref\020100621135125.24299.91290.stgit@baageli.muru.com\0"
  "ref\01277211592.29532.20.camel@e102109-lin.cambridge.arm.com\0"
  "ref\020100622132037.GV12255@atomide.com\0"
- "From\0Tony Lindgren <tony@atomide.com>\0"
- "Subject\0Re: [PATCH 2/2] arm: Make VFPv3 usable on ARMv6\0"
+ "From\0tony@atomide.com (Tony Lindgren)\0"
+ "Subject\0[PATCH 2/2] arm: Make VFPv3 usable on ARMv6\0"
  "Date\0Wed, 23 Jun 2010 10:57:03 +0300\0"
- "To\0Catalin Marinas <catalin.marinas@arm.com>\0"
- "Cc\0linux-arm-kernel@lists.infradead.org"
- " linux-omap@vger.kernel.org\0"
- "\01:1\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
+ "\00:1\0"
  "b\0"
  "* Tony Lindgren <tony@atomide.com> [100622 16:15]:\n"
  "> * Catalin Marinas <catalin.marinas@arm.com> [100622 15:53]:\n"
@@ -45,109 +43,13 @@
  "\n"
  "Regards,\n"
  "\n"
- Tony
- "\01:2\0"
- "fn\0vfpv3-armv6-fix.patch\0"
- "b\0"
- "From: Tony Lindgren <tony@atomide.com>\n"
- "Date: Mon, 21 Jun 2010 16:33:28 +0300\n"
- "Subject: [PATCH] arm: Make VFPv3 usable on ARMv6\n"
- "\n"
- "MVFR0 and MVFR1 are only available starting with ARM1136 r1p0 release\n"
- "according to \"B.5 VFP changes\" in DDI0211F_arm1136_r1p0_trm.pdf. This is\n"
- "also when TLS register got added, so we can use HAS_TLS also to test for\n"
- "MVFR0 and MVFR1.\n"
- "\n"
- "Otherwise VFPFMRX and VFPFMXR access fails and we get:\n"
- "\n"
- "Internal error: Oops - undefined instruction: 0 [#1]\n"
- "PC is at no_old_VFP_process+0x8/0x3c\n"
- "LR is at __und_svc+0x48/0x80\n"
- "...\n"
- "\n"
- "Signed-off-by: Tony Lindgren <tony@atomide.com>\n"
- "\n"
- "diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h\n"
- "index 422f3cc..3d5fc41 100644\n"
- "--- a/arch/arm/include/asm/vfpmacros.h\n"
- "+++ b/arch/arm/include/asm/vfpmacros.h\n"
- "@@ -3,6 +3,8 @@\n"
- "  *\n"
- "  * Assembler-only file containing VFP macros and register definitions.\n"
- "  */\n"
- "+#include <asm/hwcap.h>\n"
- "+\n"
- " #include \"vfp.h\"\n"
- " \n"
- " @ Macros to allow building with old toolkits (with no VFP support)\n"
- "@@ -22,12 +24,20 @@\n"
- " \tLDC\tp11, cr0, [\\base],#32*4\t\t    @ FLDMIAD \\base!, {d0-d15}\n"
- " #endif\n"
- " #ifdef CONFIG_VFPv3\n"
- "+#if __LINUX_ARM_ARCH__ <= 6\n"
- "+\tldr\t\\tmp, =elf_hwcap\t\t    @ may not have MVFR regs\n"
- "+\tldr\t\\tmp, [\\tmp, #0]\n"
- "+\ttst\t\\tmp, #HWCAP_VFPv3D16\n"
- "+\tldceq\tp11, cr0, [\\base],#32*4\t\t    @ FLDMIAD \\base!, {d16-d31}\n"
- "+\taddne\t\\base, \\base, #32*4\t\t    @ step over unused register space\n"
- "+#else\n"
- " \tVFPFMRX\t\\tmp, MVFR0\t\t\t    @ Media and VFP Feature Register 0\n"
- " \tand\t\\tmp, \\tmp, #MVFR0_A_SIMD_MASK\t    @ A_SIMD field\n"
- " \tcmp\t\\tmp, #2\t\t\t    @ 32 x 64bit registers?\n"
- " \tldceql\tp11, cr0, [\\base],#32*4\t\t    @ FLDMIAD \\base!, {d16-d31}\n"
- " \taddne\t\\base, \\base, #32*4\t\t    @ step over unused register space\n"
- " #endif\n"
- "+#endif\n"
- " \t.endm\n"
- " \n"
- " \t@ write all the working registers out of the VFP\n"
- "@@ -38,10 +48,18 @@\n"
- " \tSTC\tp11, cr0, [\\base],#32*4\t\t    @ FSTMIAD \\base!, {d0-d15}\n"
- " #endif\n"
- " #ifdef CONFIG_VFPv3\n"
- "+#if __LINUX_ARM_ARCH__ <= 6\n"
- "+\tldr\t\\tmp, =elf_hwcap\t\t    @ may not have MVFR regs\n"
- "+\tldr\t\\tmp, [\\tmp, #0]\n"
- "+\ttst\t\\tmp, #HWCAP_VFPv3D16\n"
- "+\tstceq\tp11, cr0, [\\base],#32*4\t\t    @ FSTMIAD \\base!, {d16-d31}\n"
- "+\taddne\t\\base, \\base, #32*4\t\t    @ step over unused register space\n"
- "+#else\n"
- " \tVFPFMRX\t\\tmp, MVFR0\t\t\t    @ Media and VFP Feature Register 0\n"
- " \tand\t\\tmp, \\tmp, #MVFR0_A_SIMD_MASK\t    @ A_SIMD field\n"
- " \tcmp\t\\tmp, #2\t\t\t    @ 32 x 64bit registers?\n"
- " \tstceql\tp11, cr0, [\\base],#32*4\t\t    @ FSTMIAD \\base!, {d16-d31}\n"
- " \taddne\t\\base, \\base, #32*4\t\t    @ step over unused register space\n"
- " #endif\n"
- "+#endif\n"
- " \t.endm\n"
- "diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c\n"
- "index 315a540..8063a32 100644\n"
- "--- a/arch/arm/vfp/vfpmodule.c\n"
- "+++ b/arch/arm/vfp/vfpmodule.c\n"
- "@@ -15,6 +15,7 @@\n"
- " #include <linux/sched.h>\n"
- " #include <linux/init.h>\n"
- " \n"
- "+#include <asm/cputype.h>\n"
- " #include <asm/thread_notify.h>\n"
- " #include <asm/vfp.h>\n"
- " \n"
- "@@ -549,10 +550,13 @@ static int __init vfp_init(void)\n"
- " \t\t/*\n"
- " \t\t * Check for the presence of the Advanced SIMD\n"
- " \t\t * load/store instructions, integer and single\n"
- "-\t\t * precision floating point operations.\n"
- "+\t\t * precision floating point operations. Only check\n"
- "+\t\t * for NEON if the hardware has the MVFR registers.\n"
- " \t\t */\n"
- "-\t\tif ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)\n"
- "-\t\t\telf_hwcap |= HWCAP_NEON;\n"
- "+\t\tif ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {\n"
- "+\t\t\tif ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)\n"
- "+\t\t\t\telf_hwcap |= HWCAP_NEON;\n"
- "+\t\t}\n"
- " #endif\n"
- " \t}\n"
- " \treturn 0;"
+ "Tony\n"
+ "-------------- next part --------------\n"
+ "A non-text attachment was scrubbed...\n"
+ "Name: vfpv3-armv6-fix.patch\n"
+ "Type: text/x-diff\n"
+ "Size: 3323 bytes\n"
+ "Desc: not available\n"
+ URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20100623/75317dfe/attachment.bin>
 
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+c1805c763b4bfe7ec201fda36d739f1e751e4fc18d76cf3050712578f68987de

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