Re: DMA understanding

[Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>]

On Tue, Jun 29, 2010 at 12:10:48AM +0530, Abhinav Srivastava wrote:
> 
> Hi there,
> 
> I am trying to understand how an HVM guest domain performs its DMA operations, and how this DMA operations are intercepted by the Xen. I wanted to understand both the code path with and without Vt-d support (for intel processors). On looking inside the Xen code, I found that iommu code is inside the vmx/vtd/ directory only. By seeing the code, my understanding is that when Vt-d is enabled, iommu.c and dmar.c inside the vtd directory is the place to look for DMA operations. However, I do not understand which code path inside the hypervisor is getting used in case of Vt-d is disabled?  How does Xen intercept guest DMA operations in this case? I am using Xen 3.3 version for my project (I admit that it is very old version).

Lets start without the Intel VT-d or AMD Vi in the picture.

When the QEMU boots up an HVM guest, it emulates everything the guest
sees or does. Which means that when the guest decides to use the
IDE controller to do DMA operations, QEMU decodes that operation
(look in hw/ide.c, search for 'WIN_READDMA') and it follows it
through by setting up a callback mechanism that ends up fetching
the data from wherever the guest disk and then triggering an interrupt
so that the guest noticies that the DMA finished.

So in essence the hypervisor does not deal with guest DMA at all.

When you insert an Intel VT-d or AMD Vi chipset you have the option
of passing in a native PCI device to the guest. If you don't pass
in a PCI device then you are still using the old mechanism.