From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anton Vorontsov Subject: [PATCH 0/8] sdhci: Move real work out of an atomic context Date: Wed, 14 Jul 2010 17:07:28 +0400 Message-ID: <20100714130728.GA27339@oksana.dev.rtsoft.ru> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Return-path: Received: from imap.ru.mvista.com ([213.79.90.228]:18705 "EHLO buildserver.ru.mvista.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1755625Ab0GNNHc (ORCPT ); Wed, 14 Jul 2010 09:07:32 -0400 Content-Disposition: inline Sender: linux-mmc-owner@vger.kernel.org List-Id: linux-mmc@vger.kernel.org To: Andrew Morton Cc: Wolfram Sang , Albert Herranz , Matt Fleming , Ben Dooks , Pierre Ossman , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org Hi all, Currently the sdhci driver does everything in the atomic context. And what is worse, PIO transfers are made from the IRQ handler. This causes huge latencies (up to 120 ms). On some P2020 SOCs, DMA and card detection is broken, which means that kernel polls for the card via PIO transfers every second. Needless to say that this is quite bad. So, this patch set reworks sdhci code to avoid atomic context, almost completely. We only do two device memory operations in the atomic context, and all the rest is threaded. I noticed no throughput drop neither with PIO transfers nor with DMA (tested on MPC8569E CPU), while latencies should be greatly improved. Thanks, -- Anton Vorontsov email: cbouatmailru@gmail.com irc://irc.freenode.net/bd2 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from buildserver.ru.mvista.com (unknown [213.79.90.228]) by ozlabs.org (Postfix) with ESMTP id A2BCCB6F05 for ; Wed, 14 Jul 2010 23:07:31 +1000 (EST) Date: Wed, 14 Jul 2010 17:07:28 +0400 From: Anton Vorontsov To: Andrew Morton Subject: [PATCH 0/8] sdhci: Move real work out of an atomic context Message-ID: <20100714130728.GA27339@oksana.dev.rtsoft.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Cc: Matt Fleming , Albert Herranz , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org, Ben Dooks , Pierre Ossman List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hi all, Currently the sdhci driver does everything in the atomic context. And what is worse, PIO transfers are made from the IRQ handler. This causes huge latencies (up to 120 ms). On some P2020 SOCs, DMA and card detection is broken, which means that kernel polls for the card via PIO transfers every second. Needless to say that this is quite bad. So, this patch set reworks sdhci code to avoid atomic context, almost completely. We only do two device memory operations in the atomic context, and all the rest is threaded. I noticed no throughput drop neither with PIO transfers nor with DMA (tested on MPC8569E CPU), while latencies should be greatly improved. Thanks, -- Anton Vorontsov email: cbouatmailru@gmail.com irc://irc.freenode.net/bd2