From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=55832 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Oex9c-000166-QN for qemu-devel@nongnu.org; Fri, 30 Jul 2010 17:30:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1Oex9a-0000R1-SQ for qemu-devel@nongnu.org; Fri, 30 Jul 2010 17:30:08 -0400 Received: from hall.aurel32.net ([88.191.82.174]:38275) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1Oex9a-0000Qt-Ko for qemu-devel@nongnu.org; Fri, 30 Jul 2010 17:30:06 -0400 Date: Fri, 30 Jul 2010 23:30:04 +0200 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH] Ignore writes of perf reg (cp15 with crm == 12) Message-ID: <20100730213004.GH20459@volta.aurel32.net> References: <1280086076-20649-1-git-send-email-loic.minier@linaro.org> <20100728142305.GF13511@bee.dooz.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20100728142305.GF13511@bee.dooz.org> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?iso-8859-15?Q?Lo=EFc?= Minier Cc: qemu-devel@nongnu.org On Wed, Jul 28, 2010 at 04:23:05PM +0200, Loïc Minier wrote: > I found out Matt Waddel has written a better looking patch, but I > didn't test it; reviews welcome -- attached > > -- > Loïc Minier Return-Path: X-Spam-Checker-Version: SpamAssassin 3.1.4 (2006-07-26) on pig.zood.org X-Spam-Level: X-Spam-Status: No, score=-98.5 required=3.0 tests=BAYES_40, RATWARE_GECKO_BUILD,USER_IN_WHITELIST autolearn=disabled version=3.1.4 X-Original-To: lool@dooz.org Delivered-To: lool@pig.zood.org Received: from mail-qy0-f172.google.com (mail-qy0-f172.google.com [209.85.216.172]) by pig.zood.org (Postfix) with ESMTP id B070E4C0C6 for ; Tue, 27 Jul 2010 19:22:31 +0200 (CEST) Received: by qyk1 with SMTP id 1so2929439qyk.3 for ; Tue, 27 Jul 2010 10:22:30 -0700 (PDT) Received: by 10.224.60.211 with SMTP id q19mr7862913qah.85.1280251350380; Tue, 27 Jul 2010 10:22:30 -0700 (PDT) X-Forwarded-To: lool@dooz.org X-Forwarded-For: loic.minier@linaro.org lool@dooz.org Delivered-To: loic.minier@linaro.org Received: by 10.231.142.228 with SMTP id r36cs265184ibu; Tue, 27 Jul 2010 10:22:29 -0700 (PDT) Received: by 10.216.87.209 with SMTP id y59mr9230573wee.91.1280251348423; Tue, 27 Jul 2010 10:22:28 -0700 (PDT) Received: from adelie.canonical.com (adelie.canonical.com [91.189.90.139]) by mx.google.com with ESMTP id v17si6997588weq.181.2010.07.27.10.22.27; Tue, 27 Jul 2010 10:22:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of matt.waddel@canonical.com designates 91.189.90.139 as permitted sender) client-ip=91.189.90.139; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of matt.waddel@canonical.com designates 91.189.90.139 as permitted sender) smtp.mail=matt.waddel@canonical.com Received: from hutte.canonical.com ([91.189.90.181]) by adelie.canonical.com with esmtp (Exim 4.69 #1 (Debian)) id 1OdnrH-0004PW-Kf for ; Tue, 27 Jul 2010 18:22:27 +0100 Received: from 75-162-181-248.slkc.qwest.net ([75.162.181.248] helo=[192.168.1.102]) by hutte.canonical.com with esmtpsa (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.69) (envelope-from ) id 1OdnrH-00067z-BO for loic.minier@linaro.org; Tue, 27 Jul 2010 18:22:27 +0100 Message-ID: <4C4F15C4.2070502@canonical.com> Date: Tue, 27 Jul 2010 11:22:12 -0600 From: Matt Waddel User-Agent: Mozilla/5.0 (X11; U; Linux i686 (x86_64); en-US; rv:1.9.1.11) Gecko/20100711 Lightning/1.0b1 Thunderbird/3.0.6 ThunderBrowse/3.3.1 MIME-Version: 1.0 To: =?ISO-8859-1?Q?Lo=EFc_Minier?= Subject: qemu cp15 register patch X-Enigmail-Version: 1.0.1 Content-Type: multipart/mixed; boundary="------------020300010903030602010303" > > The patch needs a Signed-off-by. > diff --git a/target-arm/cpu.h b/target-arm/cpu.h > index 7440163..b5d8a6c 100644 > --- a/target-arm/cpu.h > +++ b/target-arm/cpu.h > @@ -130,6 +130,7 @@ typedef struct CPUARMState { > uint32_t c6_data; > uint32_t c9_insn; /* Cache lockdown registers. */ > uint32_t c9_data; > + uint32_t c9_pmcr_data; /* Performance Monitor Control Register */ The name looks a bit strange, c9_pmcr seems to be better. > uint32_t c12_vbar; /* secure/nonsecure vector base address register. */ > uint32_t c12_mvbar; /* monitor vector base address register. */ > uint32_t c13_fcse; /* FCSE PID. */ > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 1f5f307..2136c07 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -1558,6 +1558,15 @@ void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val) > case 1: /* TCM memory region registers. */ > /* Not implemented. */ > goto bad_reg; > + case 12: > + switch (op2) { > + case 0: > + env->cp15.c9_pmcr_data = val; Maybe writing a small comment that it is not fully implemented will help for later. > + break; > + default: > + goto bad_reg; > + } > + break; > default: > goto bad_reg; > } > @@ -1897,6 +1906,13 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn) > goto bad_reg; > /* L2 Lockdown and Auxiliary control. */ > return 0; > + case 12: > + switch (op2) { > + case 0: > + return env->cp15.c9_pmcr_data; > + default: > + goto bad_reg; > + } > default: > goto bad_reg; > } > diff --git a/target-arm/machine.c b/target-arm/machine.c > index 8595549..026776d 100644 > --- a/target-arm/machine.c > +++ b/target-arm/machine.c > @@ -46,6 +46,7 @@ void cpu_save(QEMUFile *f, void *opaque) > qemu_put_be32(f, env->cp15.c6_data); > qemu_put_be32(f, env->cp15.c9_insn); > qemu_put_be32(f, env->cp15.c9_data); > + qemu_put_be32(f, env->cp15.c9_pmcr_data); > qemu_put_be32(f, env->cp15.c13_fcse); > qemu_put_be32(f, env->cp15.c13_context); > qemu_put_be32(f, env->cp15.c13_tls1); > @@ -156,6 +157,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) > env->cp15.c6_data = qemu_get_be32(f); > env->cp15.c9_insn = qemu_get_be32(f); > env->cp15.c9_data = qemu_get_be32(f); > + env->cp15.c9_pmcr_data = qemu_get_be32(f); > env->cp15.c13_fcse = qemu_get_be32(f); > env->cp15.c13_context = qemu_get_be32(f); > env->cp15.c13_tls1 = qemu_get_be32(f); > Adding fields here imply a change of CPU_SAVE_VERSION. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net