From: marek.vasut@gmail.com (Marek Vasut)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] [ARM] pxa: MFU pin configuration to support Fast ethernet.
Date: Wed, 25 Aug 2010 15:25:20 +0200 [thread overview]
Message-ID: <201008251525.20575.marek.vasut@gmail.com> (raw)
In-Reply-To: <AANLkTinzvaHvOXPP=Nr79OBB_8DdNum3MjMJnLzzTBg0@mail.gmail.com>
Dne St 25. srpna 2010 15:20:15 Eric Miao napsal(a):
> On Wed, Aug 25, 2010 at 9:11 PM, Marek Vasut <marek.vasut@gmail.com> wrote:
> > Dne St 25. srpna 2010 11:18:41 Sachin Sanap napsal(a):
> >> Signed-off-by: Sachin Sanap <ssanap@marvell.com>
> >> ---
> >> arch/arm/mach-mmp/aspenite.c | 18 ++++++++++++++++++
> >> arch/arm/mach-mmp/include/mach/mfp-pxa168.h | 19 +++++++++++++++++++
> >> 2 files changed, 37 insertions(+), 0 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
> >> index d19c26c..a235551 100644
> >> --- a/arch/arm/mach-mmp/aspenite.c
> >> +++ b/arch/arm/mach-mmp/aspenite.c
> >> @@ -74,6 +74,24 @@ static unsigned long common_pin_config[] __initdata =
> >> { GPIO105_CI2C_SDA,
> >> GPIO106_CI2C_SCL,
> >>
> >> + /* MFU */
> >> + GPIO86_TX_CLK,
> >> + GPIO87_TX_EN,
> >> + GPIO88_TX_DQ3,
> >> + GPIO89_TX_DQ2,
> >> + GPIO90_TX_DQ1,
> >> + GPIO91_TX_DQ0,
> >> + GPIO92_MII_CRS,
> >> + GPIO93_MII_COL,
> >> + GPIO94_RX_CLK,
> >> + GPIO95_RX_ER,
> >> + GPIO96_RX_DQ3,
> >> + GPIO97_RX_DQ2,
> >> + GPIO98_RX_DQ1,
> >> + GPIO99_RX_DQ0,
> >> + GPIO100_MII_MDC,
> >> + GPIO101_MII_MDIO,
> >> + GPIO103_RX_DV,
> >> };
> >
> > That's for ethernet, right ? Can you take aspenite apart (aka. remove the
> > ethernet chip or whatnot) ?
> >
> > Maybe if you'd go the way I outlined in the previous mail commenting on
> > your 1/3 patch and apply that approach on the whole aspenite, then
> > there's a space for further improvement. That is, split the MFP config
> > structure into smaller chunks and configure the pins only in case that
> > particular device is enabled in kernel. See colibri_pxa320 for reference
> > again.
>
> Well, if it's not separable, and that those pins are not able to be used
> as other functions, I'd prefer this being in one consistent array actually.
Hm, there is no public documentation for PXA168 (as always in marvell case),
right ? It's hard to know if those pins can be used for something else or review
the code at all :-(
next prev parent reply other threads:[~2010-08-25 13:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-08-25 9:18 [PATCH 2/3] [ARM] pxa: MFU pin configuration to support Fast ethernet Sachin Sanap
2010-08-25 13:11 ` Marek Vasut
2010-08-25 13:20 ` Eric Miao
2010-08-25 13:25 ` Marek Vasut [this message]
[not found] <1280849830-5350-1-git-send-email-ssanap@marvell.com>
[not found] ` <1280849830-5350-2-git-send-email-ssanap@marvell.com>
[not found] ` <1280849830-5350-3-git-send-email-ssanap@marvell.com>
2010-08-03 11:21 ` Eric Miao
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