Re: Re: [PATCH 12/13] Nested Virtualization: vram

[Christoph Egger <Christoph.Egger@amd.com>]

On Monday 13 September 2010 17:51:15 Tim Deegan wrote:
> At 16:36 +0100 on 13 Sep (1284395780), Christoph Egger wrote:
> > On Monday 13 September 2010 15:50:40 Tim Deegan wrote:
> > > OK.  That's certainly confusing.  I think the fix is to have all the
> > > outward-facing interfaces to the p2m code always operate on the host
> > > (L1->L0) p2m.  None of their callers would know what to do with an L2
> > > pfn anyway.  Only code that explicitly asks for it (e.g. the NPF
> > > handler) should see the L2->L0 p2m.
> >
> > The instruction emulator also must see the L2 -> L0 p2m
> > - to be more precise it is __hvm_copy() that fetches the
> > instruction - in order to be able to emulate instructions
> > for the L2 guest the L1 guest does not intercept.
>
> It needs to be able to fetch from virtual addresses; if we make
> paging_gva_to_gfn always return an N1 pfn then that should just work.
> Does the instruction emulator need to read N2 pfns for anything else?

The L2 -> L0 p2m (= nestedp2m) is needed to translate the L2 guest's
cr3 into host physical address in order to be able to walk the L2 guest's
page table. Then we have the L2 guest physical address where the
instruction sits. Then the instruction emulator is invoked and operates
as usual with the difference that the nestedp2m is used instead of the
hostp2m.

Christoph


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