From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoph Egger Subject: Re: [PATCH 16/16] vmx: nest: expose cpuid and CR4.VMXE Date: Wed, 15 Sep 2010 11:43:28 +0200 Message-ID: <201009151143.29026.Christoph.Egger@amd.com> References: <1283959344-3837-1-git-send-email-qing.he@intel.com> <1283959344-3837-17-git-send-email-qing.he@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1283959344-3837-17-git-send-email-qing.he@intel.com> Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: xen-devel@lists.xensource.com Cc: Qing He List-Id: xen-devel@lists.xenproject.org On Wednesday 08 September 2010 17:22:24 Qing He wrote: > expose VMX cpuid and allow guest to enable VMX. > > Signed-off-by: Qing He > Signed-off-by: Eddie Dong > > --- > > diff -r 3f40a1f79cf8 tools/libxc/xc_cpuid_x86.c > --- a/tools/libxc/xc_cpuid_x86.c Wed Sep 08 19:47:39 2010 +0800 > +++ b/tools/libxc/xc_cpuid_x86.c Wed Sep 08 19:49:06 2010 +0800 > @@ -128,8 +128,17 @@ > const unsigned int *input, unsigned int *regs, > int is_pae) > { > + unsigned long nest; > + > switch ( input[0] ) > { > + case 0x00000001: > + /* ECX[5] is availability of VMX */ > + xc_get_hvm_param(xch, domid, HVM_PARAM_NESTEDHVM, &nest); > + if (nest) > + regs[2] |= 0x20; > + break; > + I merged this part into my tools patch this way: /* ECX[5] is availability of VMX */ if (is_nstedhvm) set_bit(X86_FEATURE_VMXE, regs[2]); break; > case 0x00000004: > /* > * EAX[31:26] is Maximum Cores Per Package (minus one). > diff -r 3f40a1f79cf8 xen/include/asm-x86/hvm/hvm.h > --- a/xen/include/asm-x86/hvm/hvm.h Wed Sep 08 19:47:39 2010 +0800 > +++ b/xen/include/asm-x86/hvm/hvm.h Wed Sep 08 19:49:06 2010 +0800 > @@ -295,7 +295,8 @@ > X86_CR4_DE | X86_CR4_PSE | X86_CR4_PAE | \ > X86_CR4_MCE | X86_CR4_PGE | X86_CR4_PCE | \ > X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT | \ > - (cpu_has_xsave ? X86_CR4_OSXSAVE : 0)))) > + (cpu_has_xsave ? X86_CR4_OSXSAVE : 0) | \ > + X86_CR4_VMXE))) I changed this to (cpu_has_vmx ? X86_CR4_VMXE : 0)))) where cpu_has vmx is in defined as #define cpu_has_vmx boot_cpu_has(X86_FEATURE_VMXE) Christoph > /* These exceptions must always be intercepted. */ > #define HVM_TRAP_MASK ((1U << TRAP_machine_check) | (1U << > TRAP_invalid_op)) > -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632