[U-Boot] [PATCH v5 1/2] APM821xx: Add CPU support

[Stefan Roese <sr@denx.de>]

Hi Marri,

On Monday 27 September 2010 21:47:04 tmarri at apm.com wrote:
> From: Tirumala Marri <tmarri@apm.com>
> 
> APM821XX is a new line of SoCs which are derivatives of
> PPC44X family of processors. This patch adds support of CPU, cache,
> tlb, 32k ocm, bootstraps, PLB and AHB bus.

Hopefully the last (coding style related) comments below.

<snip>

> +++ b/arch/powerpc/cpu/ppc4xx/cpu.c
> @@ -250,6 +250,20 @@ static char *bootstrap_str[] = {
> 
>  };
>  static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
>  #endif
> 
> +#if defined(CONFIG_APM821XX)
> +#define SDR0_PINSTP_SHIFT       29
> +static char *bootstrap_str[] = {
> +       "RESERVED",
> +       "RESERVED",
> +       "RESERVED",
> +       "NAND (8 bits)",
> +       "NOR  (8 bits)",
> +       "NOR  (8 bits) w/PLL Bypassed",
> +       "I2C (Addr 0x54)",
> +       "I2C (Addr 0x52)",
> +};

Indentation with tabs instead of spaces please.

> +++ b/arch/powerpc/include/asm/apm821xx.h
> @@ -0,0 +1,70 @@
> +/*
> + * Copyright (c) 2010, Applied Micro Circuits Corporation
> + * Author: Tirumala R Marri <tmarri@apm.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef _APM821XX_H_
> +#define _APM821XX_H_
> +
> +#define CONFIG_SDRAM_PPC4xx_IBM_DDR2	/* IBM DDR(2) controller */

Insert empty line here.

> +/* Memory mapped registers */
> +#define CONFIG_SYS_PERIPHERAL_BASE      0xEF600000

Please use tab instead of spaces for indentation.

> +#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
> +#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
> +
> +#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
> +
> +#define SDR0_SRST0_DMC		0x00200000
> +#define SDR0_SRST1_AHB		0x00000040      /* PLB4XAHB bridge */

Again, empty would look better here.

> +/* AHB config. */
> +#define AHB_TOP                 0xA4
> +#define AHB_BOT                 0xA5

Tabs vs. spaces again.

> +
> +

Remove one of those empty lines.

> +#define PLLSYS0_FWD_DIV_A_MASK	0x000000f0	/* Fwd Div A */
> +#define PLLSYS0_FWD_DIV_B_MASK	0x0000000f	/* Fwd Div B */
> +#define PLLSYS0_FB_DIV_MASK	0x0000ff00	/* Feedback divisor */
> +#define PLLSYS0_OPB_DIV_MASK	0x0c000000	/* OPB Divisor */
> +#define PLLSYS0_EPB_DIV_MASK    0x00000300      /* EPB divisor */

Tabs vs spaces again. Please fix globally and resubmit. Thanks.

Cheers,
Stefan

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