Re: USB asynchronous mode feedback format

[Daniel Mack <zonque@gmail.com>]

On Thu, Oct 14, 2010 at 05:54:35PM +0200, Julian Scheel wrote:
> Am Donnerstag, 14. Oktober 2010, 17:39:13 schrieb Daniel Mack:
> > What about the voltage levels? Are they within the specs? I had a quick
> > look and it seems that Vdd on the codec has to be within 3.0 .. 3.6V,
> > while the signals you provide rather seem to be in the range of 5V? The
> > absolute maximum ratings say that Vdd must not be greater than 4.0V.
> 
> This might indeed be an issue. The clock signals have about 5V level... The 
> data coming from the uC still has 4.2V
> This might be too much... Stays the question how to lower the voltage properly 
> there... Any suggestions?

This get more and more off-topic for the ALSA community, but ...

For the signals, use a voltage shifter, something like the 74LVC2T45.
For Vdd, if you have to provide that to the board, use a proper
switching power regulator with low ripple, or an LDO, and care well for
blocking.

Also check whether the voltages you applied all the time could have
damaged the chip permanently.

Daniel